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    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    1.
    发明申请
    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20100148169A1

    公开(公告)日：2010-06-17

    申请号：US12498816

    申请日：2009-07-07

    申请人： Do-Hyun KIM ,  Pil-Sang YUN ,  Ki-Won KIM ,  Dong-Hoon LEE ,  Chang-Oh JEONG

    发明人： Do-Hyun KIM ,  Pil-Sang YUN ,  Ki-Won KIM ,  Dong-Hoon LEE ,  Chang-Oh JEONG

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

    摘要： A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.

    摘要翻译： 薄膜晶体管（TFT）基板具有改善的电性能和减少的外观缺陷以及制造TFT基板的方法。 TFT基板包括：形成在绝缘基板的表面上的栅极布线; 氧化物活性层图案，其形成在栅极布线上并且包括第一材料的氧化物; 缓冲层图案，其设置在所述氧化物活性层图案上以直接接触所述氧化物活性层图案并且包括第二材料; 以及形成在所述缓冲层图案上以绝缘地穿过所述栅极布线的数据布线，其中所述第一材料的氧化物的吉布斯自由能低于所述第二材料的氧化物的吉布斯自由能。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    3.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    显示面板及其制造方法

    公开(公告)号：US20090212290A1

    公开(公告)日：2009-08-27

    申请号：US12354115

    申请日：2009-01-15

    申请人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    发明人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    IPC分类号： H01L27/088 ,  H01L21/77

    CPC分类号： H01L33/0041 ,  H01L27/124 ,  H01L29/458

    摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译： 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    4.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 失效
    显示面板及其制造方法

    公开(公告)号：US20120228619A1

    公开(公告)日：2012-09-13

    申请号：US13472716

    申请日：2012-05-16

    申请人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    发明人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    IPC分类号： H01L29/786 ,  H01L33/08

    CPC分类号： H01L33/0041 ,  H01L27/124 ,  H01L29/458

    摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译： 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    THIN FILM TRANSISTOR SUBSTRATE AND FABRICATING METHOD THEREOF
    5.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND FABRICATING METHOD THEREOF 审中-公开
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20080099765A1

    公开(公告)日：2008-05-01

    申请号：US11923914

    申请日：2007-10-25

    申请人： Do-Hyun KIM ,  Je-Hun LEE ,  Chang-Oh JEONG

    发明人： Do-Hyun KIM ,  Je-Hun LEE ,  Chang-Oh JEONG

    IPC分类号： H01L29/04 ,  H01L21/336

    CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L29/458

    摘要： A thin film transistor substrate and fabricating method thereof, the thin film transistor substrate including a substrate, a gate line and a gate electrode, each including a metal adhesion layer and a Cu alloy layer disposed on the substrate, an active layer and an ohmic contact layer disposed over the gate electrode, a gate insulating layer disposed between the gate electrode and the active and ohmic contact layers, source and drain electrodes disposed on the ohmic contact layer, and a data line connected to the source electrode.

    摘要翻译： 一种薄膜晶体管基板及其制造方法，所述薄膜晶体管基板包括基板，栅极线和栅电极，每个薄膜晶体管基板包括设置在基板上的金属粘合层和Cu合金层，有源层和欧姆接触 设置在栅极电极上的栅极绝缘层，设置在栅电极与有源欧姆接触层之间的栅极绝缘层，设置在欧姆接触层上的源电极和漏电极以及连接到源电极的数据线。

    ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME 失效
    阵列基板，具有该基板的显示装置及其制造方法

    公开(公告)号：US20080017862A1

    公开(公告)日：2008-01-24

    申请号：US11779534

    申请日：2007-07-18

    申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    IPC分类号： H01L29/04 ,  H01L21/00

    CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124

    摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.

    摘要翻译： 阵列基板包括开关元件，信号传输线，钝化层和像素电极。 开关元件设置在绝缘基板上。 信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。 阻挡层设置在绝缘基板上。 导电线设置在阻挡层上并且包括铜或铜合金。 氮化铜层覆盖导电线。 钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。 像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

    ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME 审中-公开
    阵列基板，具有该基板的显示装置及其制造方法

    公开(公告)号：US20110309510A1

    公开(公告)日：2011-12-22

    申请号：US13222558

    申请日：2011-08-31

    申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    IPC分类号： H01L23/482

    CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124

    摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.

    摘要翻译： 阵列基板包括开关元件，信号传输线，钝化层和像素电极。 开关元件设置在绝缘基板上。 信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。 阻挡层设置在绝缘基板上。 导电线设置在阻挡层上并且包括铜或铜合金。 氮化铜层覆盖导电线。 钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。 像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

    THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE
    8.
    发明申请
    THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE 有权
    薄膜晶体管，具有薄膜晶体管的阵列基板和制造阵列基板的方法

    公开(公告)号：US20080308826A1

    公开(公告)日：2008-12-18

    申请号：US11930502

    申请日：2007-10-31

    申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

    IPC分类号： H01L29/78 ,  H01L21/02

    CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288

    摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

    摘要翻译： 薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。 源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。 栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。 因此，由光引起的漏电流最小化。 结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

    THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF
    10.
    发明申请
    THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF 有权
    薄膜晶体管面板及其制作方法

    公开(公告)号：US20110012203A1

    公开(公告)日：2011-01-20

    申请号：US12605566

    申请日：2009-10-26

    申请人： Chang-Oh JEONG ,  Dong-Hoon LEE

    发明人： Chang-Oh JEONG ,  Dong-Hoon LEE

    IPC分类号： H01L27/088 ,  H01L21/84

    CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/66765

    摘要： A thin film transistor panel includes; an insulating substrate, a gate line including a gate electrode disposed on the insulating substrate, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the gate insulating layer, the semiconductor layer including a sidewall, a data line including a source electrode disposed on the semiconductor layer, a drain electrode disposed substantially opposite to and spaced apart from the source electrode, a first protective film disposed on the data line, the first protective film including a sidewall, a second protective film disposed on the first protective film and including a sidewall, and a pixel electrode electrically connected to the drain electrode, wherein the sidewall of the second protective film is disposed inside an area where the sidewall of the first protective film is disposed, and the source electrode and the drain electrode cover the sidewall of the semiconductor layer.

    摘要翻译： 薄膜晶体管面板包括： 绝缘基板，包括设置在绝缘基板上的栅电极的栅极线，设置在栅极上的栅极绝缘层，设置在栅极绝缘层上的半导体层，包括侧壁的半导体层，包括源极的数据线 设置在所述半导体层上的电极，与所述源极电极基本相对并间隔设置的漏电极，设置在所述数据线上的第一保护膜，所述第一保护膜包括侧壁，设置在所述第一保护膜上的第二保护膜 并且包括侧壁和与漏电极电连接的像素电极，其中第二保护膜的侧壁设置在设置有第一保护膜的侧壁的区域的内侧，源电极和漏电极覆盖 半导体层的侧壁。