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    Plasma etching methods using nitrogen memory species for sustaining glow discharge
    11.
    发明申请
    Plasma etching methods using nitrogen memory species for sustaining glow discharge 有权
    使用氮记忆物质的等离子体蚀刻方法来维持辉光放电

    公开(公告)号：US20070193977A1

    公开(公告)日：2007-08-23

    申请号：US11359787

    申请日：2006-02-22

    申请人： Hong-Ji Lee ,  Shih-Ping Hong ,  An-Chyi Wei

    发明人： Hong-Ji Lee ,  Shih-Ping Hong ,  An-Chyi Wei

    IPC分类号： C23F1/00 ,  C03C25/68 ,  H01L21/302

    CPC分类号： H01L21/3065

    摘要： Methods are described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas and one or more process gases into the chamber; and etching the substrate, wherein the introduction of the N2 gas is stopped prior to etching, and wherein etching comprises an initial plasma ignition wherein at least a portion of the N2 gas remains present in the chamber during initial plasma ignition. Additional methods are described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas and one or more process gases into the chamber; applying power to an electrode in the chamber such that an N2 memory species is formed; and etching the substrate, where the introduction of the N2 gas into the chamber can be stopped prior to etching. Other methods are also described which comprise: providing a plasma etching apparatus having an etching chamber; disposing a substrate to be etched in the chamber; introducing N2 gas into the chamber; applying power to an electrode in the chamber such that an N2 memory species is formed; removing the applied power from the electrode in the chamber; stopping the introduction of the N2 gas into the chamber and introducing one or more process gases into the chamber; and etching the substrate.

    摘要翻译： 描述了包括：提供具有蚀刻室的等离子体蚀刻装置的方法; 将待蚀刻的基板设置在所述室中; 将N 2 O 2气体和一种或多种工艺气体引入所述室中; 以及蚀刻所述衬底，其中在蚀刻之前停止引入N 2 O 2气体，并且其中蚀刻包括初始等离子体点火，其中N 2 N 2 N 2的至少一部分 初始等离子体点火期间气体保留在腔室中。 描述了附加方法，其包括：提供具有蚀刻室的等离子体蚀刻装置; 将待蚀刻的基板设置在所述室中; 将N 2 O 2气体和一种或多种工艺气体引入所述室中; 向腔室中的电极施加功率，使得形成N 2种记忆物质; 并且在蚀刻之前可以停止引入N 2气体到腔室中的衬底。 还描述了其它方法，其包括：提供具有蚀刻室的等离子体蚀刻装置; 将待蚀刻的基板设置在所述室中; 将N 2 N 2气体引入所述室中; 向腔室中的电极施加功率，使得形成N 2种记忆物质; 从室中的电极去除施加的功率; 停止将N 2 N 2气体引入室中并将一种或多种工艺气体引入室中; 并蚀刻衬底。

    SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME
    15.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME 有权
    半导体结构及其制造方法

    公开(公告)号：US20100167021A1

    公开(公告)日：2010-07-01

    申请号：US12345305

    申请日：2008-12-29

    申请人： Hong-Ji Lee ,  Shih-Ping Hong ,  Fang-Hao Hsu

    发明人： Hong-Ji Lee ,  Shih-Ping Hong ,  Fang-Hao Hsu

    IPC分类号： B32B3/10 ,  G03F7/20

    CPC分类号： H01L21/31116 ,  H01L21/0332 ,  H01L21/31122 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139

    摘要： A method of forming a semiconductor structure is provided. First, a target layer and a mask layer are sequentially formed on a substrate. Thereafter, a first pattern transfer layer having a plurality of openings is formed on the mask layer. Afterwards, a second pattern transfer layer is formed in the openings of the first pattern transfer layer. The mask layer is then patterned, using the first pattern transfer layer and the second pattern transfer layer as a mask, so as to form a patterned mask layer. Further, the target layer is patterned using the patterned mask layer.

    摘要翻译： 提供一种形成半导体结构的方法。 首先，在基板上依次形成目标层和掩模层。 此后，在掩模层上形成具有多个开口的第一图案转印层。 之后，在第一图案转印层的开口中形成第二图案转印层。 然后使用第一图案转印层和第二图案转印层作为掩模将掩模层图案化，以形成图案化掩模层。 此外，使用图案化掩模层对目标层进行图案化。

    Methods of low temperature oxidation
    18.
    发明授权
    Methods of low temperature oxidation 有权
    低温氧化方法

    公开(公告)号：US07723240B2

    公开(公告)日：2010-05-25

    申请号：US12121382

    申请日：2008-05-15

    申请人： Shih-Ping Hong ,  Han-Hui Hsu

    发明人： Shih-Ping Hong ,  Han-Hui Hsu

    IPC分类号： H01L21/31

    CPC分类号： H01L21/28211 ,  C23C8/36 ,  H01J37/321 ,  H01L29/51 ,  H01L29/78

    摘要： A method for forming a dielectric is provided. The method includes providing a substrate having a silicon-containing semiconductor layer within a process chamber. The process chamber is capable of ionizing a process precursor to a plasma comprising an oxygen-containing element and a fluorocarbon-containing element. A surface portion of the silicon-containing material is oxidized by using the plasma to convert the surface portion into an oxidized dielectric material.

    摘要翻译： 提供了形成电介质的方法。 该方法包括在处理室内提供具有含硅半导体层的衬底。 处理室能够将工艺前体电离到包含含氧元素和含氟烃元素的等离子体中。 通过使用等离子体将含硅材料的表面部分氧化，将表面部分转化为氧化的电介质材料。

    Semiconductor structure and method of fabricating the same
    19.
    发明授权
    Semiconductor structure and method of fabricating the same 有权
    半导体结构及其制造方法

    公开(公告)号：US08697340B2

    公开(公告)日：2014-04-15

    申请号：US12345305

    申请日：2008-12-29

    申请人： Hong-Ji Lee ,  Shih-Ping Hong ,  Fang-Hao Hsu

    发明人： Hong-Ji Lee ,  Shih-Ping Hong ,  Fang-Hao Hsu

    IPC分类号： G03F7/20

    CPC分类号： H01L21/31116 ,  H01L21/0332 ,  H01L21/31122 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139

    摘要： A method of forming a semiconductor structure is provided. First, a target layer and a mask layer are sequentially formed on a substrate. Thereafter, a first pattern transfer layer having a plurality of openings is formed on the mask layer. Afterwards, a second pattern transfer layer is formed in the openings of the first pattern transfer layer. The mask layer is then patterned, using the first pattern transfer layer and the second pattern transfer layer as a mask, so as to form a patterned mask layer. Further, the target layer is patterned using the patterned mask layer.

    摘要翻译： 提供一种形成半导体结构的方法。 首先，在基板上依次形成目标层和掩模层。 此后，在掩模层上形成具有多个开口的第一图案转印层。 之后，在第一图案转印层的开口中形成第二图案转印层。 然后使用第一图案转印层和第二图案转印层作为掩模将掩模层图案化，以形成图案化掩模层。 此外，使用图案化掩模层对目标层进行图案化。

    Methods for pitch reduction
    20.
    发明授权
    Methods for pitch reduction 有权
    减速方法

    公开(公告)号：US08294278B2

    公开(公告)日：2012-10-23

    申请号：US13349122

    申请日：2012-01-12

    申请人： Shih-Ping Hong

    发明人： Shih-Ping Hong

    IPC分类号： H01L23/48

    CPC分类号： H01L21/3088 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/31144 ,  H01L27/11521

    摘要： An integrated circuit described herein includes a substrate and a plurality of lines overlying the substrate. The lines define a plurality of first trenches and a plurality of second trenches. The plurality of first trenches extend into the substrate a distance different than that of the plurality of second trenches. Adjacent pairs of lines are separated by a first trench in the plurality of first trenches, and each pair of lines comprises a first line and a second line defining a corresponding second trench in the plurality of second trenches.

    摘要翻译： 本文所述的集成电路包括衬底和覆盖衬底的多条线。 这些线限定多个第一沟槽和多个第二沟槽。 多个第一沟槽延伸到与多个第二沟槽不同的距离的衬底中。 相邻的线对被多个第一沟槽中的第一沟槽隔开，并且每对线包括限定多个第二沟槽中的对应的第二沟槽的第一线和第二线。