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公开(公告)号：US12034404B2
公开(公告)日：2024-07-09
申请号：US17158484
申请日：2021-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： Andrew J. Berkley , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker , Paul I. Bunyk , Peter D. Spear , Christopher B. Rich
CPC classification number: H03B15/003 , G06N10/20 , G06N10/40 , H01P7/08 , H01P7/105 , H03H7/01 , H10N60/12 , G06N10/00 , H03B2201/02
Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
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公开(公告)号：US20240151782A1
公开(公告)日：2024-05-09
申请号：US18517174
申请日：2023-11-22
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Emile M. Hoskinson , Mark H. Volkmann , Andrew J. Berley , George E.G. Sterling , Jed D. Whittaker
IPC: G01R33/035 , G06N10/00 , H10N60/12
CPC classification number: G01R33/0354 , G06N10/00 , H10N60/12
Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.
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公开(公告)号：US11879950B2
公开(公告)日：2024-01-23
申请号：US17054631
申请日：2019-05-16
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Emile M. Hoskinson , Mark H. Volkmann , Andrew J. Berkley , George E. G. Sterling , Jed D. Whittaker
IPC: G01R33/54 , G01R33/035 , G06N10/00 , H10N60/12
CPC classification number: G01R33/0354 , G06N10/00 , H10N60/12
Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.
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公开(公告)号：US20230400510A1
公开(公告)日：2023-12-14
申请号：US17970853
申请日：2022-10-21
Applicant: D-WAVE SYSTEMS INC.
Inventor： Jed D. Whittaker , Richard Harris , Rahul Deshpande
IPC: G01R31/317
CPC classification number: G01R31/31702 , G01R31/31709
Abstract: Systems and methods for measuring noise in discrete regions of multi-layer superconducting fabrication stacks are described. Methods for measuring noise in spatial regions of a superconducting fabrication stacks may include the use of resonators, each having a different geometry. As many resonators as spatial regions are fabricated. Data collected from the resonators may be used to calculate fill fractions and spin densities for different spatial regions of the superconducting fabrication stack. The data may be collected via on-chip electron-spin resonance. The superconducting fabrications may be part of a fabrication stack for a superconducting processor, for example a quantum processor, and the spatial region studied may be proximate to qubit wiring layers.
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公开(公告)号：US20220011384A1
公开(公告)日：2022-01-13
申请号：US17388545
申请日：2021-07-29
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Andrew J. Berkley , Mark H. Volkmann , George E.G. Sterling , Jed D. Whittaker
IPC: G01R33/035 , H01L39/22 , G06N10/00
Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
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Patent Agency Ranking
公开(公告)号：US20210218367A1
公开(公告)日：2021-07-15
申请号：US17158484
申请日：2021-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： Andrew J. Berkley , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker , Paul I. Bunyk , Peter D. Spear , Christopher B. Rich
Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
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公开(公告)号：US20200266234A1
公开(公告)日：2020-08-20
申请号：US16389669
申请日：2019-04-19
Applicant: D-WAVE SYSTEMS INC.
Inventor： Kelly T.R. Boothby , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker
Abstract: Apparatus and methods advantageously provide parallel-plate capacitors in superconducting integrated circuits. A method may include forming a metal-oxide layer to overlie at least a portion of a first capacitor plate, the first capacitor plate comprising a superconductive material, and depositing a second capacitor plate to overlie at least a portion of the metal-oxide layer, the second capacitor plate comprising a superconductive material. The method may include depositing a base electrode of superconductive material to overlie at least a portion of a substrate, depositing the first capacitor plate to overlie at least a portion of the base electrode, and superconductingly electrically coupled to the base electrode, and depositing a counter electrode of superconductive material to overlie at least a portion of the second capacitor plate, the counter electrode superconductingly electrically coupled to the second capacitor plate. The superconducting integrated circuit may include a parallel-plate capacitor and a Josephson junction.
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公开(公告)号：US20250038722A1
公开(公告)日：2025-01-30
申请号：US18716679
申请日：2022-12-06
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Jed D. Whittaker , George E.G. Sterling
Abstract: In an implementation, a tunable traveling wave parametric amplifier (TWPA) includes a T-stage that includes a first DC-SQUID and a first interface inductively communicatively coupled to the first DC SQUID operable to apply a first bias to the first DC SQUID. The T-stage also includes a second DC-SQUID electrically communicatively coupled to the first DC-SQUID in series via a center node, and a second interface inductively communicatively coupled to the second DC-SQUID operable to apply a second bias to the second DC-SQUID. The TWPA also includes a shunting resonator communicatively coupled to the center node via a coupling capacitance. The shunting resonator includes a third DC-SQUID, and a third interface inductively communicatively coupled to the third DC SQUID operable to apply a third bias to the third DC SQUID. The first, second, and third biases are adjustable to improve a bandwidth of the tunable TWPA.
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公开(公告)号：US11957065B2
公开(公告)日：2024-04-09
申请号：US17321819
申请日：2021-05-17
Applicant: D-WAVE SYSTEMS INC.
Inventor： Shuiyuan Huang , Byong H. Oh , Douglas P. Stadtler , Edward G. Sterpka , Paul I. Bunyk , Jed D. Whittaker , Fabio Altomare , Richard G. Harris , Colin C. Enderud , Loren J. Swenson , Nicolas C. Ladizinsky , Jason J. Yao , Eric G. Ladizinsky
IPC: H10N60/01 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H10N60/85 , H10N69/00
CPC classification number: H10N60/0156 , H01L21/76891 , H01L23/5223 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L23/53257 , H01L23/53285 , H10N60/85 , H10N69/00
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.
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公开(公告)号：US11874344B2
公开(公告)日：2024-01-16
申请号：US18082385
申请日：2022-12-15
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Andrew J. Berkley , Mark H. Volkmann , George E. G. Sterling , Jed D. Whittaker
IPC: G01R33/035 , G06N10/00 , H10N60/12
CPC classification number: G01R33/0354 , G06N10/00 , H10N60/12
Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
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