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    System and method for fabricating super conducting circuitry on both sides of an ultra-thin layer
    4.
    发明授权
    System and method for fabricating super conducting circuitry on both sides of an ultra-thin layer 有权
    在超薄层的两侧制造超导电路的系统和方法

    公开(公告)号：US09577177B1

    公开(公告)日：2017-02-21

    申请号：US15164365

    申请日：2016-05-25

    申请人： The United States of America as represented by the Administrator of the National Aeronautics and Space Administration

    发明人： Ari D. Brown ,  Vilem Mikula

    IPC分类号： H01L39/24

    CPC分类号： H01L23/53285 ,  H01L21/32058 ,  H01L21/743 ,  H01L21/76891

    摘要： A method of fabricating circuitry in a wafer includes depositing a superconducting metal on a silicon on insulator wafer having a handle wafer, coating the wafer with a sacrificial layer and bonding the wafer to a thermally oxide silicon wafer with a first epoxy. The method includes flipping the wafer, thinning the flipped wafer by removing a handle wafer, etching a buried oxide layer, depositing a superconducting layer, bonding the wafer to a thermally oxidized silicon wafer having a handle wafer using an epoxy, flipping the wafer again, thinning the flipped wafer, etching a buried oxide layer from the wafer and etching the sacrificial layer from the wafer. The result is a wafer having superconductive circuitry on both sides of an ultra-thin silicon layer.

    摘要翻译： 一种在晶片中制造电路的方法包括在具有处理晶片的硅绝缘体晶片上沉积超导金属，用牺牲层涂覆晶片，并将晶片与第一环氧树脂结合到热氧化硅晶片。 该方法包括翻转晶片，通过去除处理晶片，蚀刻掩埋氧化物层，沉积超导层，将晶片与使用环氧树脂的处理晶片接合的热氧化硅晶片，再次翻转晶片，从而使翻转的晶片变薄， 使翻转的晶片变薄，从晶片上蚀刻掩埋氧化物层并从晶片上蚀刻牺牲层。 结果是在超薄硅层的两侧具有超导电路的晶片。

    Method of electrochemical formation of high Tc superconducting damascene interconnect for integrated circuit
    9.
    发明授权
    Method of electrochemical formation of high Tc superconducting damascene interconnect for integrated circuit 有权
    用于集成电路的高Tc超导镶嵌互连的电化学形成方法

    公开(公告)号：US06482656B1

    公开(公告)日：2002-11-19

    申请号：US09873667

    申请日：2001-06-04

    申请人： Sergey Lopatin

    发明人： Sergey Lopatin

    IPC分类号： H01L2100

    CPC分类号： H01L21/76871 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76891 ,  H01L23/53285 ,  H01L39/2451 ,  H01L2924/0002 ,  Y10S505/742 ,  H01L2924/00

    摘要： A semiconductor device including a damascene superconducting interconnect, formed of a Ba—Cu—Ca—O superconducting material. A method of forming a superconducting damascene interconnect structure, and the structure made thereby, the method including forming a cavity in an interlevel dielectric; forming a barrier layer in the cavity; forming a seed layer in the cavity over the barrier layer; forming a Cu—Ba alloy layer; filling the cavity by depositing a Cu—Ca—O film; and annealing in oxygen flow to form a Ba—Cu—Ca—O superconductor on the barrier layer. In an alternate embodiment, no barrier layer is formed.

    摘要翻译： 包括由Ba-Cu-Ca-O超导材料形成的镶嵌超导互连的半导体器件。 一种形成超导镶嵌互连结构的方法及其制造的结构，所述方法包括在层间电介质中形成空腔; 在空腔中形成阻挡层; 在阻挡层上的空腔中形成晶种层; 形成Cu-Ba合金层; 通过沉积Cu-Ca-O膜来填充空腔; 并在氧气流中退火以在阻挡层上形成Ba-Cu-Ca-O超导体。 在替代实施例中，不形成阻挡层。

    Method for protecting a semiconductor device with a superconductive line
    10.
    发明授权
    Method for protecting a semiconductor device with a superconductive line 失效
    用超导线保护半导体器件的方法

    公开(公告)号：US5644143A

    公开(公告)日：1997-07-01

    申请号：US454542

    申请日：1995-05-30

    申请人： Michael D. Rostoker ,  Mark Schneider ,  Nicholas F. Pasch ,  Abraham Yee ,  William C. Schneider

    发明人： Michael D. Rostoker ,  Mark Schneider ,  Nicholas F. Pasch ,  Abraham Yee ,  William C. Schneider

    IPC分类号： H01L21/768 ,  H01L23/495 ,  H01L23/532 ,  H01L27/02 ,  H01L29/06 ,  H01L39/00

    CPC分类号： H01L21/76891 ,  H01L23/49579 ,  H01L23/53285 ,  H01L27/0251 ,  H01L2924/0002 ,  Y10S148/09 ,  Y10S148/093 ,  Y10S505/703 ,  Y10S505/706 ,  Y10S505/847 ,  Y10S505/90 ,  Y10T29/49121

    摘要： Various techniques for forming superconductive lines are described whereby superconductive lines can be formed by stamping, etching, polishing, or by rendering selected areas of a superconductive film (layer) non-superconductive. The superconductive material can be "perfected" (or optimized) after it is formed into lines (traces). In one embodiment, trenches are etched in a substrate, the trenches are filled with superconductive material, and any excess superconductive material overfilling the trenches is removed, such as by polishing. In another embodiment, superconductive lines are formed by rendering selected areas of a superconductive layer (i.e., areas other than the desired superconductive lines) non-superconductive by "damaging" the superconductive material by laser beam heating, or by ion implantation. Superconductive lines formed according to the invention can be used to protect semiconductor devices (e.g., transistor structures) from over-current or overheating conditions such as those caused by CMOS latch-up. Current density limits and/or thermal limits of superconductors are employed to cause a superconductive trace to become non-superconductive when these limits are exceeded.

    摘要翻译： 描述了用于形成超导线的各种技术，其中超导线可以通过冲压，蚀刻，抛光或通过使超导膜（层）非超导的选定区域形成。 超导材料在形成线（迹线）后可以“完善”（或优化）。 在一个实施例中，在衬底中蚀刻沟槽，沟槽用超导材料填充，并且例如通过抛光，去除超过沟槽的任何过量的超导材料。 在另一个实施例中，超导线通过使超导层的选定区域（即，不期望的超导线路以外的区域）通过激光束加热“超导”超导材料或通过离子注入来形成，而不是超导的。 根据本发明形成的超导线可用于保护半导体器件（例如，晶体管结构）免受过度电流或过热条件的影响，例如由CMOS闩锁引起的条件。 采用超导体的电流密度限制和/或热限制，当超过这些限值时，会使超导轨迹变得非超导。