公开(公告)号：US20180145631A1

公开(公告)日：2018-05-24

申请号：US15572731

申请日：2016-05-11

Applicant: D-Wave Systems Inc.

Inventor： Andrew J. Berkley ,  Loren J. Swenson ,  Mark H. Volkmann ,  Jed D. Whittaker ,  Paul I. Bunyk ,  Peter D. Spear ,  Christopher B. Rich

IPC: H03B15/00 ,  H01P7/10 ,  H01L39/22 ,  H01P7/08 ,  H03H7/01

CPC classification number: H03B15/003 ,  G06N10/00 ,  H01L39/223 ,  H01P7/08 ,  H01P7/105 ,  H03B2201/02 ,  H03H7/01

Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.

公开(公告)号：US12206385B2

公开(公告)日：2025-01-21

申请号：US17862605

申请日：2022-07-12

Applicant: D-WAVE SYSTEMS INC.

Inventor： Jed D. Whittaker ,  Loren J. Swenson ,  Mark H. Volkmann

IPC: H03H7/38 ,  G06N10/00 ,  H01P1/203 ,  H10N60/12

Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.

公开(公告)号：US12034404B2

公开(公告)日：2024-07-09

申请号：US17158484

申请日：2021-01-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： Andrew J. Berkley ,  Loren J. Swenson ,  Mark H. Volkmann ,  Jed D. Whittaker ,  Paul I. Bunyk ,  Peter D. Spear ,  Christopher B. Rich

IPC: H03B15/00 ,  G06N10/20 ,  G06N10/40 ,  H01P7/08 ,  H01P7/10 ,  H03H7/01 ,  H10N60/12 ,  G06N10/00

CPC classification number: H03B15/003 ,  G06N10/20 ,  G06N10/40 ,  H01P7/08 ,  H01P7/105 ,  H03H7/01 ,  H10N60/12 ,  G06N10/00 ,  H03B2201/02

Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.

公开(公告)号：US20240151782A1

公开(公告)日：2024-05-09

申请号：US18517174

申请日：2023-11-22

Applicant: D-WAVE SYSTEMS INC.

Inventor： Loren J. Swenson ,  Emile M. Hoskinson ,  Mark H. Volkmann ,  Andrew J. Berley ,  George E.G. Sterling ,  Jed D. Whittaker

IPC: G01R33/035 ,  G06N10/00 ,  H10N60/12

CPC classification number: G01R33/0354 ,  G06N10/00 ,  H10N60/12

Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.

公开(公告)号：US20240138268A1

公开(公告)日：2024-04-25

申请号：US18277688

申请日：2022-02-17

Applicant: D-WAVE SYSTEMS INC.

Inventor： Colin C. Enderud ,  Mohammad H. Amin ,  Loren J. Swenson

IPC: H10N60/01 ,  H01L23/522 ,  H01L23/532 ,  H01L25/18 ,  H10N60/12 ,  H10N60/80 ,  H10N69/00

CPC classification number: H10N60/0912 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/53285 ,  H01L25/18 ,  H10N60/12 ,  H10N60/805 ,  H10N69/00

Abstract: A method of fabrication of a superconducting device includes forming a first portion of the superconducting device on a first chip, a second portion of the superconducting device on a second chip, and bonding the first chip to the second chip, arranged in a flip-chip configuration. The first portion of the superconducting device on the first chip includes a dissipative portion of the superconducting device. A multi-layer superconducting integrated circuit is implemented so that noise-susceptible superconducting devices are positioned in wiring layers formed from a low-noise superconductive material and that underlie wiring layers that are formed from a different superconductive material. A superconducting integrated circuit has a first stack with a first superconducting wiring layer formed from a first high kinetic inductance material and a second superconducting wiring layer communicatively coupled to the first superconducting wiring layer to form a first control circuit, a second stack comprising a third superconducting wiring layer formed from a second high kinetic inductance material and a fourth superconducting wiring layer communicatively coupled the third superconducting wiring layer to form a second control circuit. The superconducting integrated circuit also has a third stack with a controllable device, and at least one of the first control circuit and the second control circuit is communicatively coupled to the controllable device.

公开(公告)号：US11879950B2

公开(公告)日：2024-01-23

申请号：US17054631

申请日：2019-05-16

Applicant: D-WAVE SYSTEMS INC.

Inventor： Loren J. Swenson ,  Emile M. Hoskinson ,  Mark H. Volkmann ,  Andrew J. Berkley ,  George E. G. Sterling ,  Jed D. Whittaker

IPC: G01R33/54 ,  G01R33/035 ,  G06N10/00 ,  H10N60/12

CPC classification number: G01R33/0354 ,  G06N10/00 ,  H10N60/12

Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.

公开(公告)号：US11663512B2

公开(公告)日：2023-05-30

申请号：US17584600

申请日：2022-01-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： Steven P. Reinhardt ,  Andrew D. King ,  Loren J. Swenson ,  Warren T. E. Wilkinson ,  Trevor Michael Lanting

IPC: G06N10/00 ,  G05B19/042

CPC classification number: G06N10/00 ,  G05B19/042 ,  G05B2219/25071

Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.

公开(公告)号：US20230143506A1

公开(公告)日：2023-05-11

申请号：US17399375

申请日：2021-08-11

Applicant: D-WAVE SYSTEMS INC.

Inventor： Mark W. Johnson ,  Paul I. Bunyk ,  Andrew J. Berkley ,  Richard G. Harris ,  Kelly T. R. Boothby ,  Loren J. Swenson ,  Emile M. Hoskinson ,  Christopher B. Rich ,  Jan E. S. Johansson

IPC: H10N60/12 ,  G06N10/00 ,  H10N60/80

CPC classification number: H10N60/124 ,  G06N10/00 ,  H10N60/805

Abstract: Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.

公开(公告)号：US20220011384A1

公开(公告)日：2022-01-13

申请号：US17388545

申请日：2021-07-29

Applicant: D-WAVE SYSTEMS INC.

Inventor： Loren J. Swenson ,  Andrew J. Berkley ,  Mark H. Volkmann ,  George E.G. Sterling ,  Jed D. Whittaker

IPC: G01R33/035 ,  H01L39/22 ,  G06N10/00

Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.

公开(公告)号：US20210218367A1

公开(公告)日：2021-07-15

申请号：US17158484

申请日：2021-01-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： Andrew J. Berkley ,  Loren J. Swenson ,  Mark H. Volkmann ,  Jed D. Whittaker ,  Paul I. Bunyk ,  Peter D. Spear ,  Christopher B. Rich

IPC: H03B15/00 ,  H01L39/22 ,  H01P7/08 ,  H01P7/10 ,  H03H7/01

Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.