Systems and methods for coupling a superconducting transmission line to an array of resonators

    公开(公告)号:US11424521B2

    公开(公告)日:2022-08-23

    申请号:US16975646

    申请日:2019-02-20

    Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.

    SYSTEMS AND METHODS FOR SIMULATING A QUANTUM PROCESSOR

    公开(公告)号:US20220253740A1

    公开(公告)日:2022-08-11

    申请号:US17617388

    申请日:2020-07-10

    Abstract: A digital processor simulates a quantum computing system by implementing a QPU model including a set of representation models and a device connectivity representation to simulate a quantum processor design or a physical quantum processor. The digital processor receives an analog waveform and generates a digital waveform representation comprising a set of waveform values that correspond to biases applied to programmable devices in a quantum processor. The digital processor selects a subset of waveform values based on channels in the device connectivity representation. The digital processor implements a representation model to compute a response based on the waveform values and a plurality of physical parameter values, the physical parameters characterizing a programmable device in a quantum processor. The device connectivity representation can be generated from a design implementation, validated against a set of rules, and adjusted to change the device connectivity representation until all of the rules are passed.

    KINETIC INDUCTANCE FOR COUPLERS AND COMPACT QUBITS

    公开(公告)号:US20220123048A1

    公开(公告)日:2022-04-21

    申请号:US17429456

    申请日:2020-02-13

    Abstract: A circuit can include a galvanic coupling of a coupler to a qubit by a segment of kinetic inductance material. The circuit can include a galvanic kinetic inductance coupler having multiple windings. The circuit can include a partially-galvanic coupler having multiple windings. The partially-galvanic coupler can include a magnetic coupling and a galvanic coupling. The circuit can include an asymmetric partially-galvanic coupler having a galvanic coupling and a first magnetic coupling to one qubit and a second magnetic coupling to a second qubit. The circuit can include a compact kinetic inductance qubit having a qubit body loop comprising a kinetic inductance material. A multilayer integrated circuit including a kinetic inductance layer can form a galvanic kinetic inductance coupling. A multilayer integrated circuit including a kinetic inductance layer can form at least a portion of a compact kinetic inductance qubit body loop.

    Dynamical isolation of a cryogenic processor

    公开(公告)号:US11105866B2

    公开(公告)日:2021-08-31

    申请号:US16397790

    申请日:2019-04-29

    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.

    SYSTEMS AND METHODS FOR COUPLING BETWEEN QUBITS

    公开(公告)号:US20230297869A1

    公开(公告)日:2023-09-21

    申请号:US18003563

    申请日:2021-06-29

    CPC classification number: G06N10/40 H10N60/805

    Abstract: A superconducting integrated circuit has a first superconducting device with a first superconducting loop, where the first superconducting loop has a first superconducting trace in a first layer of the superconducting integrated circuit, and a second superconducting device with a second superconducting loop, where the second superconducting loop has a second superconducting trace in a second layer. The first superconducting loop crosses the second superconducting loop in a crossing region. At least a portion of each of the first and the second superconducting trace inside the crossing region is narrower than at least a portion of each of the traces outside the crossing region, and follows a respective circuitous path which is inductively proximate to at least a portion of the other path.

    SYSTEMS AND METHODS FOR FABRICATING SUPERCONDUCTING INTEGRATED CIRCUITS

    公开(公告)号:US20230101616A1

    公开(公告)日:2023-03-30

    申请号:US17793151

    申请日:2020-12-18

    Abstract: Methods for mitigating microwave crosstalk and forming a component in a superconducting integrated circuit are discussed. Mitigating microwave crosstalk involves forming a microwave shield within the superconducting integrated circuit, the superconducting integrated circuit including a microwave sensitive component. The microwave shield is formed from a base layer and one or more sides, and the footprint of the microwave sensitive component is contained within the footprint of the microwave shielding base layer, with the one or more sides extending around at least a portion of the microwave sensitive component. Forming a component involves depositing a first metal layer, depositing a dielectric layer overlying the first metal layer, the dielectric layer comprising Nb2O5 that is deposited by atomic layer deposition, and depositing a second metal layer overlying the dielectric layer.

    Dynamical isolation of a cryogenic processor

    公开(公告)号:US11561269B2

    公开(公告)日:2023-01-24

    申请号:US17388545

    申请日:2021-07-29

    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.

    SYSTEMS AND METHODS TO EXTRACT QUBIT PARAMETERS

    公开(公告)号:US20210133385A1

    公开(公告)日:2021-05-06

    申请号:US17068388

    申请日:2020-10-12

    Abstract: Systems and methods are described to accurately extract device parameters and optimize the design of macroscopic superconducting structures, for example qubits. This method presents the advantage of reusing existing plaquettes to simulate different processor topologies. The physical elements of a qubits are extracted via plurality of plaquettes. Each plaquette contains at least one physical element of the qubit design and has two ports on each side. Each plaquette is concatenated to at least one other plaquette via two ports. The values of inductance (L), capacitance (C) and mutual inductance (M) and quantum critical point of the qubit design can be computed. Changing the physical elements of the qubit design and iterating the method allows to effortlessly refine the qubit design.

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