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公开(公告)号:US09768058B2
公开(公告)日:2017-09-19
申请号:US14822258
申请日:2015-08-10
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Zhiguo Sun , Qiang Fang , Christian Witt
IPC: H01L21/311 , H01L21/768 , H01L21/02 , H01L21/764 , H01L23/52
CPC classification number: H01L21/764 , H01L21/02068 , H01L21/02356 , H01L21/3105 , H01L21/31111 , H01L21/76807 , H01L21/76814 , H01L21/7682 , H01L21/76826 , H01L21/76834 , H01L21/76883 , H01L23/5222 , H01L23/53295
Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.
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公开(公告)号:US10770344B2
公开(公告)日:2020-09-08
申请号:US16244071
申请日:2019-01-09
Applicant: GLOBALFOUNDRIES INC.
Inventor: Yuping Ren , Haigou Huang , Ravi Prakash Srivastava , Zhiguo Sun , Qiang Fang , Cheng Xu , Guoxiang Ning
IPC: H01L21/768 , H01L23/522 , H01L21/311 , H01L21/02
Abstract: A method of fabricating interconnects in a semiconductor device is provided, which includes forming an interconnect layer having a conductive line and depositing a first aluminum-containing layer over the interconnect layer. A dielectric layer is deposited over the first aluminum-containing layer, followed by a second aluminum-containing layer deposited over the dielectric layer. A via opening is formed in the second aluminum-containing layer through to the conductive line, wherein the via opening has chamferless sidewalls.
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公开(公告)号:US10446395B1
公开(公告)日:2019-10-15
申请号:US15950364
申请日:2018-04-11
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Jiehui Shu , Xiaohan Wang , Qiang Fang , Zhiguo Sun , Jinping Liu , Hui Zang
IPC: H01L21/033 , H01L23/522 , H01L21/768 , H01L23/528
Abstract: Methods of self-aligned multiple patterning and structures formed by self-aligned multiple patterning. A mandrel line is patterned from a first mandrel layer disposed on a hardmask and a second mandrel layer disposed over the first mandrel layer. A first section of the second mandrel layer of the mandrel line is removed to expose a first section of the first mandrel layer. The first section of the first mandrel layer is masked, and the second sections of the second mandrel layer and the underlying second portions of the first mandrel layer are removed to expose first portions of the hardmask. The first portions of the hardmask are then removed with an etching process to form a trench in the hardmask. A second portion of the hardmask is masked by the first portion of the first mandrel layer during the etching process to form a cut in the trench.
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公开(公告)号:US09865543B1
公开(公告)日:2018-01-09
申请号:US15416152
申请日:2017-01-26
Applicant: GLOBALFOUNDRIES INC.
Inventor: Qiang Fang , Haigou Huang , Stan Tsai , John H. Zhang , Xingzhao Shi , Tai Fong Chao
IPC: H01L21/768 , H01L23/532 , H01L21/82 , H01L23/528 , H01L21/321 , H01L21/8238 , H01L21/8234
CPC classification number: H01L23/5283 , H01L21/3212 , H01L21/76802 , H01L21/76843 , H01L21/7685 , H01L21/76877 , H01L21/823475 , H01L21/823871 , H01L23/53209
Abstract: A process for forming a conductive structure includes the formation of a self-aligned, inlaid conductive cap over a cobalt-based contact. The inlaid conductive cap is formed using a damascene process by depositing a conductive layer comprising tungsten or copper over a recessed cobalt-based contact, followed by a CMP step to remove excess portions of the conductive layer. The conductive cap can cooperate with a liner/barrier layer to form an effective barrier to cobalt migration and oxidation.
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公开(公告)号:US09741610B2
公开(公告)日:2017-08-22
申请号:US14740035
申请日:2015-06-15
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Qiang Fang , Zhiguo Sun , Jiehui Shu
IPC: H01L29/40 , H01L21/768 , H01L23/532 , H01L23/522 , H01L21/311
CPC classification number: H01L21/76879 , H01L21/31144 , H01L21/76802 , H01L21/7684 , H01L21/76843 , H01L23/5226 , H01L23/53238
Abstract: A starting metallization structure for electrically coupling one or more underlying semiconductor devices, the structure including a bottom layer of dielectric material with metal-filled via(s) situated therein, a protective layer over the bottom layer, and a top layer of dielectric material over the protective layer. A sacrificial layer of amorphous silicon is formed over the top layer of dielectric material, a protective layer is formed over the sacrificial layer and via(s) through each layer above the metal-filled via(s) to expose the metal of the metal-filled via(s). The protective layer is then selectively removed, as well as the sacrificial layer of amorphous silicon.
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