公开(公告)号：US10770344B2

公开(公告)日：2020-09-08

申请号：US16244071

申请日：2019-01-09

申请人： GLOBALFOUNDRIES INC.

发明人： Yuping Ren ,  Haigou Huang ,  Ravi Prakash Srivastava ,  Zhiguo Sun ,  Qiang Fang ,  Cheng Xu ,  Guoxiang Ning

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L21/311 ,  H01L21/02

摘要： A method of fabricating interconnects in a semiconductor device is provided, which includes forming an interconnect layer having a conductive line and depositing a first aluminum-containing layer over the interconnect layer. A dielectric layer is deposited over the first aluminum-containing layer, followed by a second aluminum-containing layer deposited over the dielectric layer. A via opening is formed in the second aluminum-containing layer through to the conductive line, wherein the via opening has chamferless sidewalls.

公开(公告)号：US10692812B2

公开(公告)日：2020-06-23

申请号：US15980085

申请日：2018-05-15

申请人： GLOBALFOUNDRIES Inc.

发明人： Ravi Prakash Srivastava ,  Hui Zang ,  Jiehui Shu

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L21/308 ,  H01L21/02 ,  H01L21/033

摘要： Methods of fabricating an interconnect structure. A hardmask is deposited over an interlayer dielectric layer, and a block mask is formed that covers an area on the hardmask. A sacrificial layer is formed over the block mask and the hardmask, and the sacrificial layer is patterned to form a mandrel that extends across the block mask.

公开(公告)号：US20190355658A1

公开(公告)日：2019-11-21

申请号：US15980085

申请日：2018-05-15

申请人： GLOBALFOUNDRIES Inc.

发明人： Ravi Prakash Srivastava ,  Hui Zang ,  Jiehui Shu

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L21/308 ,  H01L21/02 ,  H01L21/033

摘要： Methods of fabricating an interconnect structure. A hardmask is deposited over an interlayer dielectric layer, and a block mask is formed that covers an area on the hardmask. A sacrificial layer is formed over the block mask and the hardmask, and the sacrificial layer is patterned to form a mandrel that extends across the block mask.

公开(公告)号：US20160358851A1

公开(公告)日：2016-12-08

申请号：US14729188

申请日：2015-06-03

申请人： GLOBALFOUNDRIES, INC.

发明人： Sunil Kumar Singh ,  Ravi Prakash Srivastava ,  Xusheng Wu ,  Akshey Sehgal ,  Teck Jung Tang

IPC分类号： H01L23/522 ,  H01L21/02 ,  H01L23/532 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/02282 ,  H01L21/31144 ,  H01L21/76801 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76811 ,  H01L23/53238 ,  H01L23/53295

摘要： Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes depositing an organic dielectric material overlying a semiconductor substrate for forming an organic interlayer dielectric (OILD) layer. An opening is formed in the OILD layer and a conductive metal fill is deposited in the opening for forming a metal line and/or a via.

摘要翻译： 提供了用于制造集成电路的集成电路和方法。 在一个示例中，制造集成电路的方法包括沉积覆盖在用于形成有机层间电介质（OILD）层的半导体衬底上的有机电介质材料。 在OILD层中形成开口，并且在用于形成金属线和/或通孔的开口中沉积导电金属填充物。

公开(公告)号：US10784119B2

公开(公告)日：2020-09-22

申请号：US16154306

申请日：2018-10-08

申请人： GLOBALFOUNDRIES Inc.

发明人： Ravi Prakash Srivastava ,  Hsueh-Chung Chen ,  Steven McDermott ,  Martin O'Toole ,  Brendan O'Brien ,  Terry A. Spooner

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/033 ,  H01L21/768

摘要： Methods of self-aligned multiple patterning. First and second mandrels are formed over a hardmask, and a conformal spacer layer is deposited over the first mandrel, the second mandrel, and the hardmask between the first mandrel and the second mandrel. A planarizing layer is patterned to form first and second trenches that expose first and second lengthwise portions of the conformal spacer layer respectively between the first and second mandrels. After patterning the planarizing layer, the first and second lengthwise portions of the conformal spacer layer are removed with an etching process to expose respective portions of the hardmask along a non-mandrel line. A third lengthwise portion of the conformal spacer layer is masked during the etching process by a portion of the planarizing layer and defines a non-mandrel etch mask.

公开(公告)号：US20190079408A1

公开(公告)日：2019-03-14

申请号：US15698775

申请日：2017-09-08

申请人： GLOBALFOUNDRIES INC.

发明人： Sohan Singh Mehta ,  Mark C. Duggan ,  Sunil Kumar Singh ,  Robert Justin Morgan ,  SherJang Singh ,  Ravi Prakash Srivastava ,  Craig D. Higgins ,  Jason L. Behnke ,  Vineet Sharma

IPC分类号： G03F7/32

摘要： The disclosure is directed to a method for lithographic patterning. The method may include: exposing a photoresist to a radiant energy; developing the photoresist in a first developer, thereby creating an opening within the photoresist including sidewalls having a slant; and developing the photoresist in a second developer immediately after the developing of the photoresist in the first developer, thereby reducing the slant of the sidewalls of the opening. Where the photoresist is a positive tone development (PTD) photoresist, the first developer may include a positive developer, and the second developer may include a negative developer. Where the photoresist is a negative tone development (NTD) photoresist, the first developer may include a negative developer, and the second developer may include a positive developer.

公开(公告)号：US10192780B1

公开(公告)日：2019-01-29

申请号：US15991529

申请日：2018-05-29

申请人： GLOBALFOUNDRIES Inc.

发明人： Xiaohan Wang ,  Jiehui Shu ,  Brendan O'Brien ,  Terry A. Spooner ,  Jinping Liu ,  Ravi Prakash Srivastava

IPC分类号： H01L29/40 ,  H01L21/768 ,  H01L21/311 ,  H01L23/522 ,  H01L23/528

摘要： Methods of self-aligned double patterning and improved interconnect structures formed by self-aligned double patterning. A mandrel line including an upper layer and a lower layer is formed over a hardmask. A non-mandrel cut block is formed over a portion of a non-mandrel line, after which the upper layer of the mandrel line is removed. An etch mask is formed over a first section of the lower layer of the mandrel line defining a mandrel cut block over a first portion of the hardmask. The first section of the lower layer is arranged between adjacent second sections of the lower layer. The second sections of the lower layer of the mandrel line are removed to expose respective second portions of the hardmask, and the second portions of the hardmask are removed to form a trench. The mandrel cut block masks the first portion of the hardmask during the etching process.

公开(公告)号：US20200111677A1

公开(公告)日：2020-04-09

申请号：US16154306

申请日：2018-10-08

申请人： GLOBALFOUNDRIES Inc.

发明人： Ravi Prakash Srivastava ,  Hsueh-Chung Chen ,  Steven McDermott ,  Martin O'Toole ,  Brendan O'Brien ,  Terry A. Spooner

IPC分类号： H01L21/311 ,  H01L21/033 ,  H01L21/308 ,  H01L21/768

摘要： Methods of self-aligned multiple patterning. First and second mandrels are formed over a hardmask, and a conformal spacer layer is deposited over the first mandrel, the second mandrel, and the hardmask between the first mandrel and the second mandrel. A planarizing layer is patterned to form first and second trenches that expose first and second lengthwise portions of the conformal spacer layer respectively between the first and second mandrels. After patterning the planarizing layer, the first and second lengthwise portions of the conformal spacer layer are removed with an etching process to expose respective portions of the hardmask along a non-mandrel line. A third lengthwise portion of the conformal spacer layer is masked during the etching process by a portion of the planarizing layer and defines a non-mandrel etch mask.

公开(公告)号：US09691654B1

公开(公告)日：2017-06-27

申请号：US14978650

申请日：2015-12-22

申请人： GLOBALFOUNDRIES Inc.

发明人： Sunil Kumar Singh ,  Sohan Singh Mehta ,  Ravi Prakash Srivastava

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L21/76817 ,  H01L21/31144 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/528

摘要： Back end of line via formation for semiconductor devices and methods of fabricating the semiconductor devices. One method includes, for instance: obtaining a wafer with a substrate and at least one contact in the substrate; depositing at least one lithography stack over the substrate; performing lithography to pattern at least one via opening; depositing a block co-polymer coating over the wafer into the at least one via opening; performing an ashing to remove excess block co-polymer material and form block co-polymer caps; and performing a thermal bake to separate the block co-polymer caps into a first material and a second material. An intermediate semiconductor device is also disclosed.

公开(公告)号：US09613909B2

公开(公告)日：2017-04-04

申请号：US14824181

申请日：2015-08-12

申请人： GLOBALFOUNDRIES Inc.

发明人： Sunil Kumar Singh ,  Ravi Prakash Srivastava ,  Nicholas Robert Stokes

IPC分类号： H01L21/768 ,  H01L23/535 ,  H01L23/532

CPC分类号： H01L23/5226 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/2885 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76873 ,  H01L21/76883 ,  H01L21/76895 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53257 ,  H01L23/53266 ,  H01L23/535

摘要： Metal filling processes for semiconductor devices and methods of fabricating semiconductor devices. One method includes, for instance: obtaining a wafer with at least one contact opening; depositing a metal alloy into at least a portion of the at least one contact opening; separating the metal alloy into a first metal layer and a second metal layer; depositing a barrier stack over the wafer; forming at least one trench opening; forming at least one via opening; and depositing at least one metal material into the trench openings and via openings. An intermediate semiconductor device is also disclosed.