公开(公告)号：US4497683A

公开(公告)日：1985-02-05

申请号：US374308

申请日：1982-05-03

申请人： George K. Celler ,  McDonald Robinson

发明人： George K. Celler ,  McDonald Robinson

IPC分类号： C30B25/18 ,  H01L21/20 ,  H01L21/762 ,  C30B25/10 ,  B05D5/12

CPC分类号： C30B25/18 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/76294 ,  Y10S117/905 ,  Y10S148/003 ,  Y10S148/09 ,  Y10S148/123

摘要： Dielectrically isolated semiconductor devices are producible through a relatively convenient fabrication procedure. In this fabrication procedure, a substrate having regions of single crystal silicon and regions of silicon oxide is employed. Such substrate is expeditiously produced by methods which leave the surface of the single crystal regions below those of the silicon oxide regions. Silicon is deposited by CVD onto the structure with its regions of silicon dioxide and single crystal silicon. Initially, the conditions of the CVD procedure are controlled so that epitaxial silicon grows on the regions of single crystal silicon but essentially no growth is induced on the silicon oxide regions. When the growth of the single crystal regions has proceeded sufficiently to produce a substantially planar structure, advantageously the deposition conditions are adjusted so that silicon is also deposited on the surface of the silicon oxide. The polycrystalline or amorphous silicon layer overlying regions of silicon oxide produced from this growth is then converted into single crystal silicon.

摘要翻译： 绝缘隔离的半导体器件可通过相对方便的制造工艺生产。 在该制造方法中，使用具有单晶硅区域和氧化硅区域的衬底。 通过使单晶区域的表面低于氧化硅区域的方法，快速地制造这种衬底。 通过CVD将硅沉积到具有二氧化硅和单晶硅的区域的结构上。 首先，控制CVD工艺的条件使得外延硅在单晶硅的区域上生长，但是在氧化硅区域上基本上不产生生长。 当单晶区域的生长充分进行以产生基本上平面的结构时，有利地调节沉积条件，使得硅也沉积在氧化硅的表面上。 然后将由该生长产生的覆盖氧化硅区域的多晶或非晶硅层转化为单晶硅。

公开(公告)号：US08148242B2

公开(公告)日：2012-04-03

申请号：US12811210

申请日：2008-02-20

申请人： Oleg Kononchuk ,  George K. Celler

发明人： Oleg Kononchuk ,  George K. Celler

IPC分类号： H01L21/477

CPC分类号： H01L21/76254 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/02321 ,  H01L21/3105 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/7624

摘要： A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.

摘要翻译： 一种制造包括由一种或多种半导体材料制成的薄工作层的SeOI衬底的方法; 支撑层; 以及在工作层和支撑层之间的薄的掩埋氧化物层。 该方法包括具有厚度大于薄掩埋氧化物层所需厚度的掩埋氧化物层的中间SeOI衬底的制造步骤; 以及掩埋氧化物层的溶解步骤，以便与其形成薄的掩埋氧化物层。 在溶解步骤之后，进行衬底的氧化步骤以在衬底上形成氧化层，以及氧化物迁移步骤，用于通过工作层扩散氧化物层的至少一部分，以增加氧化层的电接口质量 底物并降低其Dit值。

公开(公告)号：US20100283118A1

公开(公告)日：2010-11-11

申请号：US12811210

申请日：2008-02-20

申请人： Oleg Kononchuk ,  George K. Celler

发明人： Oleg Kononchuk ,  George K. Celler

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/02321 ,  H01L21/3105 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/7624

摘要： A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.

摘要翻译： 一种制造包括由一种或多种半导体材料制成的薄工作层的SeOI衬底的方法; 支撑层; 以及在工作层和支撑层之间的薄的掩埋氧化物层。 该方法包括具有厚度大于薄掩埋氧化物层所需厚度的掩埋氧化物层的中间SeOI衬底的制造步骤; 以及掩埋氧化物层的溶解步骤，以便与其形成薄的掩埋氧化物层。 在溶解步骤之后，进行基板的氧化步骤，以在基板上形成氧化层，以及氧化物迁移步骤，用于通过工作层扩散氧化物层的至少一部分，以增加电接口质量 底物并降低其Dit值。

公开(公告)号：US07605054B2

公开(公告)日：2009-10-20

申请号：US11736809

申请日：2007-04-18

申请人： George K. Celler

发明人： George K. Celler

IPC分类号： H01L21/30

CPC分类号： H01L21/2007 ,  H01L21/02032 ,  H01L21/67346 ,  H01L2221/68359 ,  H01L2221/68368

摘要： A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

摘要翻译： 一种用于通过提供具有第一和第二表面的晶片形成具有可回收支撑件的装置晶片的方法，至少晶片的第一表面包括适于在其上接收或形成电子器件的半导体材料，提供支撑衬底，其具有 并且提供晶片的第二表面或支撑衬底的上表面的空隙特征，其量足以使得它们之间的连接结合形成结构，其中所述结合形成在晶片和 并且适合于将晶片和支撑基板保持在一起，同时将电子器件形成或施加到晶片的第一表面，但是由于空隙特征使得该基片与晶片分离，而在该界面处的连接接合是可分离的，因此 基材可以重复使用。

公开(公告)号：US4835113A

公开(公告)日：1989-05-30

申请号：US123695

申请日：1987-11-23

申请人： George K. Celler ,  Lee E. Trimble

发明人： George K. Celler ,  Lee E. Trimble

IPC分类号： H01L21/225 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762

CPC分类号： H01L21/74 ,  H01L21/76297

摘要： In dielectrically isolated devices a buried conducting layer adjacent to the dielectric layer is produced by a drift effect. In particular, if arsenic antimony and/or phosphorus is present in the silicon dioxide layer, it is caused to drift from this layer and enter the adjacent isolated silicon region while maintaining a relatively narrow spatial configuration. Thus, a discrete buried highly conductive layer is formed. This configuration is particularly useful for transistor configurations such as utilized in switching applications.

摘要翻译： 在介电隔离器件中，通过漂移效应产生与电介质层相邻的掩埋导电层。 特别地，如果二氧化硅层中存在砷锑和/或磷，则使其从该层漂移并进入相邻的隔离硅区域，同时保持相对较窄的空间结构。 因此，形成离散的埋入高导电层。 这种配置对于诸如在开关应用中使用的晶体管配置特别有用。

公开(公告)号：US4258078A

公开(公告)日：1981-03-24

申请号：US105918

申请日：1979-12-21

申请人： George K. Celler ,  Thomas E. Seidel

发明人： George K. Celler ,  Thomas E. Seidel

IPC分类号： H01L21/263 ,  H01L21/268 ,  H01L21/321 ,  H01L21/768 ,  H01L23/525 ,  B05D3/06

CPC分类号： H01L21/2636 ,  H01L21/268 ,  H01L21/32115 ,  H01L21/7684 ,  H01L21/76894 ,  H01L23/5258 ,  H01L2924/0002 ,  Y10T29/49156

摘要： The sharp features that appear on metallization patterns defined by conventional etching processes can be eliminated by instantaneous melting with short laser pulses. Flow is minimized due to the brevity of the lifetime of the molten state but surface tension removes the sharp corners. With polysilicon metallization conductivity is also improved.

摘要翻译： 通过常规蚀刻工艺限定的金属化图案上出现的尖锐特征可以通过短激光脉冲瞬时熔化来消除。 由于熔融状态的寿命的简短，流动被最小化，而表面张力消除了尖角。 随着多晶硅金属化的传导性也得到提高。

公开(公告)号：US4240843A

公开(公告)日：1980-12-23

申请号：US908792

申请日：1978-05-23

申请人： George K. Celler ,  Gabriel L. Miller

发明人： George K. Celler ,  Gabriel L. Miller

IPC分类号： H01L21/761 ,  H01L21/263 ,  H01L21/265 ,  H01L21/268 ,  H01L21/331 ,  H01L21/76 ,  H01L29/06 ,  H01L29/40 ,  H01L29/73 ,  H01L29/861 ,  H01L29/872 ,  H01L21/26

CPC分类号： H01L29/408 ,  H01L21/2636 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/76 ,  H01L29/0642 ,  H01L29/872 ,  Y10S148/055 ,  Y10S148/092 ,  Y10S148/093

摘要： The specification describes structures, and methods for making them, in which self-guarded p-n junctions or the electrical isolation between multiple devices in an integrated circuit are formed using regions of amorphous semiconductor. The structures are conveniently formed by ion damaging the semiconductor to form the amorphous region and annealing selected portions of the amorphous region by selective radiation annealing.

摘要翻译： 本说明书描述了使用非晶半导体区域形成集成电路中的自保护p-n结或多个器件之间的电隔离的结构及其制造方法。 通过离子损伤半导体以形成非晶区并且通过选择性辐射退火对非晶区的选定部分进行退火，便利地形成结构。

公开(公告)号：US07956436B2

公开(公告)日：2011-06-07

申请号：US12548623

申请日：2009-08-27

申请人： George K. Celler

发明人： George K. Celler

IPC分类号： H01L27/12

CPC分类号： H01L21/2007 ,  H01L21/02032 ,  H01L21/67346 ,  H01L2221/68359 ,  H01L2221/68368

摘要： A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

摘要翻译： 一种用于通过提供具有第一和第二表面的晶片形成具有可回收支撑件的装置晶片的方法，至少晶片的第一表面包括适于在其上接收或形成电子器件的半导体材料，提供支撑衬底，其具有 并且提供晶片的第二表面或支撑衬底的上表面的空隙特征，其量足以使得它们之间的连接结合形成结构，其中所述结合形成在晶片和 并且适合于将晶片和支撑基板保持在一起，同时将电子器件形成或施加到晶片的第一表面，但是由于空隙特征使得该基片与晶片分离，而在该界面处的连接接合是可分离的，因此 基材可以重复使用。

公开(公告)号：US20090261344A1

公开(公告)日：2009-10-22

申请号：US12489887

申请日：2009-06-23

申请人： George K. Celler

发明人： George K. Celler

IPC分类号： H01L29/04

CPC分类号： H01L21/02667 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/2026 ,  Y10S438/938

摘要： A method for making a crystalline wafer, in which an interface layer is associated with a support substrate. A first layer is associated with the interface layer in a strained state. The interface layer is melted sufficiently to substantially uncouple the first layer from the support substrate to relax the first layer from the strained to state to a relaxed state. The interface material is solidified with the first layer in the relaxed state to obtain a first wafer.

摘要翻译： 一种用于制造晶体晶片的方法，其中界面层与支撑衬底相关联。 第一层与处于紧张状态的界面层相关联。 界面层被充分熔化以使第一层基本上与支撑衬底分离，以使第一层从应变状态松弛到松弛状态。 界面材料在松弛状态下与第一层固化以获得第一晶片。

公开(公告)号：US20080261377A1

公开(公告)日：2008-10-23

申请号：US11736809

申请日：2007-04-18

申请人： George K. Celler

发明人： George K. Celler

IPC分类号： H01L21/30

CPC分类号： H01L21/2007 ,  H01L21/02032 ,  H01L21/67346 ,  H01L2221/68359 ,  H01L2221/68368

摘要： A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

摘要翻译： 一种用于通过提供具有第一和第二表面的晶片形成具有可回收支撑件的装置晶片的方法，至少晶片的第一表面包括适于在其上接收或形成电子器件的半导体材料，提供支撑衬底，其具有 并且提供晶片的第二表面或支撑衬底的上表面的空隙特征，其量足以使得它们之间的连接结合形成结构，其中所述结合形成在晶片和 并且适合于将晶片和支撑基板保持在一起，同时将电子器件形成或施加到晶片的第一表面，但是由于空隙特征使得该基片与晶片分离，而在该界面处的连接接合是可分离的，因此 基材可以重复使用。