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公开(公告)号：US20210365096A1
公开(公告)日：2021-11-25
申请号：US17306786
申请日：2021-05-03
Applicant: Intel Corporation
Inventor： Devadatta V. Bodas , Muralidhar Rajappa , Justin J. Song , Andy Hoffman
IPC: G06F1/324 , G06F1/3228
Abstract: A system with improved power performance for tasks executed in parallel. A plurality of processing cores each to execute tasks. An inter-core messaging unit to conveys messages between the cores. A power management agent transitions a first core into a lower power state responsive to the first core waiting for a second core to complete a second task. In some embodiments long messages are subdivided to allow a receiving core to resume useful work sooner.
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公开(公告)号：US20180188790A1
公开(公告)日：2018-07-05
申请号：US15906960
申请日：2018-02-27
Applicant: INTEL CORPORATION
Inventor： Brian J. Griffith , Viktor D. Vogman , Justin J. Song
CPC classification number: G06F1/3206 , G06F1/26 , G06F1/3209 , H04B3/546 , H04B3/548 , H04B3/56 , H04B2203/547 , H04B2203/5483 , H04B2203/5495 , H04H20/38 , H04L47/50 , Y04S40/146
Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
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公开(公告)号：US20170289300A1
公开(公告)日：2017-10-05
申请号：US15084377
申请日：2016-03-29
Applicant: Intel Corporation
Inventor： Justin J. Song , Devadatta V. Bodas , Muralidhar Rajappa , Andy Hoffman , Mariusz Oriol , Gopal Mundada
CPC classification number: H04L63/08 , G06F1/3203 , G06F21/554 , H04L41/04 , H04L41/24
Abstract: A method and apparatus for coordinating and authenticating requests for data. In one embodiment, the apparatus comprises: a baseboard management controller (BMC); and a request coordinator coupled to the BMC to intercept BMC requests and to provide intercepted requests to the BMC, where the coordination interface comprises a request parser to parse parameters for each of the BMC requests, one or more queues to store the requests while the BMC is servicing another BMC request, and a command submitter to send individual BMC requests to the BMC, wherein the BMC is operable to generate the responses to the BMC requests received from the coordination interface and to send the responses to the coordination interface.
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公开(公告)号：US09588823B2
公开(公告)日：2017-03-07
申请号：US14582979
申请日：2014-12-24
Applicant: Intel Corporation
Inventor： Muralidhar Rajappa , Andy Hoffman , Devadatta V. Bodas , Justin J. Song , James W. Alexander
CPC classification number: G06F9/52 , G06F9/5083 , G06F9/5094 , G06F9/522 , G06F2209/5013 , Y02D10/22
Abstract: A system and method for distributed computing, including executing a job of distributed computing on compute nodes. The speed of parallel tasks of the job executing on the compute nodes are adjusted to increase performance of the job or to lower power consumption of the job, or both, wherein the adjusting is based on imbalances of respective speeds of the parallel tasks.
Abstract translation: 一种用于分布式计算的系统和方法，包括在计算节点上执行分布式计算任务。 调整在计算节点上执行的作业的并行任务的速度以提高作业的性能或降低作业的功率消耗，或者两者，其中调整基于并行任务的相应速度的不平衡。
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15.发明申请公开(公告)号：US20160054780A1
公开(公告)日：2016-02-25
申请号：US14582764
申请日：2014-12-24
Applicant: Intel Corporation
Inventor： Devadatta V. (Deva) Bodas , Justin J. Song , Muralidhar (Murali) Rajappa , Andy Hoffman , James W. (Jimbo) Alexander , Joseph A. Schaefer , Sunil K. Mahawar
CPC classification number: G06F1/3203 , G05B15/02 , G06F1/30 , G06F1/3209 , G06F1/3228 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/4881 , G06F9/4893 , G06F9/5094 , G06Q50/06 , H04L41/0833 , H04L43/08 , H04L47/783 , H04L47/821 , Y02D10/22 , Y04S40/162 , Y04S40/168
Abstract: An indication of a mode for a job is received. An available power for the job is determined based on the mode. A first power for the job is allocated based on the available power. A first frequency for the job is determined based on the available power. The first power is adjusted based on the available power.
Abstract translation: 接收到作业模式的指示。 基于该模式确定作业的可用功率。 基于可用功率分配该作业的第一个功率。 基于可用功率确定作业的第一个频率。 第一个功率根据可用功率进行调整。
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Patent Agency Ranking
公开(公告)号：US20150381237A1
公开(公告)日：2015-12-31
申请号：US14319485
申请日：2014-06-30
Applicant: INTEL CORPORATION
Inventor： Brian J. Griffith , Viktor D. Vogman , Justin J. Song
CPC classification number: G06F1/3206 , G06F1/26 , G06F1/3209 , H04B3/546 , H04B3/548 , H04B3/56 , H04B2203/547 , H04B2203/5483 , H04B2203/5495 , H04H20/38 , H04L47/50 , Y04S40/146
Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
Abstract translation: 服务器系统包括公用电源总线，用于通过公共电源总线提供直流（DC）电力的电源，至少一个节点，其包括处理器以通过公共电源总线接收DC电力;发射机电容耦合到 公共电源总线，用于通过公共电源总线从电源传输电力信息信号;以及至少一个接收器，电容耦合到公共电力总线，以接收由发射机发送的电力信息信号，并将接收到的功率信息信号提供给 该至少一个节点。 分别耦合在公共电源总线与电源和至少一个节点中的每一个的多个缓冲器为高频和低频电流提供路径间隔。
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17.发明授权公开(公告)号：US09971391B2
公开(公告)日：2018-05-15
申请号：US14757903
申请日：2015-12-23
Applicant: Intel Corporation
Inventor： Devadatta Bodas , Meenakshi Arunachalam , Ilya Sharapov , Charles R. Yount , Scott B. Huck , Ramakrishna Huggahalli , Justin J. Song , Brian J. Griffith , Muralidhar Rajappa , Lingdan (Linda) Zeng
CPC classification number: G06F1/3206 , G06F1/324 , G06F11/3428 , Y02D10/126
Abstract: A method of assessing energy efficiency of a High-performance computing (HPC) system, including: selecting a plurality of HPC workloads to run on a system under test (SUT) with one or more power constraints, wherein the SUT includes a plurality of HPC nodes in the HPC system, executing the plurality of HPC workloads on the SUT, and generating a benchmark metric for the SUT based on a baseline configuration for each selected HPC workload and a plurality of measured performance per power values for each executed workload at each selected power constraint is shown.
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公开(公告)号：US09933829B2
公开(公告)日：2018-04-03
申请号：US15258803
申请日：2016-09-07
Applicant: INTEL CORPORATION
Inventor： Brian J. Griffith , Viktor D. Vogman , Justin J. Song
CPC classification number: G06F1/3206 , G06F1/26 , G06F1/3209 , H04B3/546 , H04B3/548 , H04B3/56 , H04B2203/547 , H04B2203/5483 , H04B2203/5495 , H04H20/38 , H04L47/50 , Y04S40/146
Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
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公开(公告)号：US09927857B2
公开(公告)日：2018-03-27
申请号：US14582756
申请日：2014-12-24
Applicant: Intel Corporation
Inventor： Justin J. Song , Devadatta V. (Deva) Bodas , Muralidhar (Murali) Rajappa , Andy Hoffman , James W. (Jimbo) Alexander , Joseph A. Schaefer , Sunil K. Mahawar
CPC classification number: G06F1/3203 , G05B15/02 , G06F1/30 , G06F1/3209 , G06F1/3228 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/4881 , G06F9/4893 , G06F9/5094 , G06Q50/06 , H04L41/0833 , H04L43/08 , H04L47/783 , H04L47/821 , Y02D10/22 , Y04S40/162 , Y04S40/168
Abstract: A process identifier for a job is collected. The job runs on a plurality of nodes. The job is identified using the process identifier. A node for the job is identified. An amount of power consumed by the node to run the job is determined.
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公开(公告)号：US09921633B2
公开(公告)日：2018-03-20
申请号：US14582764
申请日：2014-12-24
Applicant: Intel Corporation
Inventor： Devadatta V. (Deva) Bodas , Justin J. Song , Muralidhar (Murali) Rajappa , Andy Hoffman , James W. (Jimbo) Alexander , Joseph A. Schaefer , Sunil K. Mahawar
CPC classification number: G06F1/3203 , G05B15/02 , G06F1/30 , G06F1/3209 , G06F1/3228 , G06F1/3234 , G06F1/329 , G06F1/3296 , G06F9/4881 , G06F9/4893 , G06F9/5094 , G06Q50/06 , H04L41/0833 , H04L43/08 , H04L47/783 , H04L47/821 , Y02D10/22 , Y04S40/162 , Y04S40/168
Abstract: An indication of a mode for a job is received. An available power for the job is determined based on the mode. A first power for the job is allocated based on the available power. A first frequency for the job is determined based on the available power. The first power is adjusted based on the available power.
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