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公开(公告)号:US20170178990A1
公开(公告)日:2017-06-22
申请号:US14973184
申请日:2015-12-17
Applicant: Intel Corporation
Inventor: Sasha Oster , Srikant Nekkanty , Joshua D. Heppner , Adel A. Elsherbini , Yoshihiro Tomita , Debendra Mallik , Shawna M. Liff , Yoko Sekihara
Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
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公开(公告)号:US11830831B2
公开(公告)日:2023-11-28
申请号:US16327810
申请日:2016-09-23
Applicant: INTEL CORPORATION
Inventor: Georgios Dogiamis , Sasha Oster , Johanna Swan , Shawna Liff , Adel Elsherbini , Telesphor Kamgaing , Aleksandar Aleksov
CPC classification number: H01L23/66 , H01P3/121 , H01L2223/6627
Abstract: Integration of a side-radiating waveguide launcher system into a semiconductor package beneficially permits the coupling of a waveguide directly to the semiconductor package. Included are a first conductive member and a second conductive member separated by a dielectric material. Also included is a conductive structure, such as a plurality of vias, that conductively couples the first conductive member and the second conductive member. Together, the first conductive member, the second conductive member, and the conductive structure form an electrically conductive side-radiating waveguide launcher enclosing shaped space within the dielectric material. The shaped space includes a narrow first end and a wide second end. An RF excitation element is disposed proximate the first end and a waveguide may be operably coupled proximate the second end of the shaped space.
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公开(公告)号:US10992016B2
公开(公告)日:2021-04-27
申请号:US16466629
申请日:2017-01-05
Applicant: Intel Corporation
Inventor: Telesphor Kamgaing , Sasha Oster , Georgios Dogiamis , Johanna Swan
Abstract: Embodiments of the invention include a mm-wave waveguide connector and methods of forming such devices. In an embodiment the mm-wave waveguide connector may include a plurality of mm-wave launcher portions, and a plurality of ridge based mm-wave filter portions each communicatively coupled to one of the mm-wave launcher portions. In an embodiment, the ridge based mm-wave filter portions each include a plurality of protrusions that define one or more resonant cavities. Additional embodiments may include a multiplexer portion communicatively coupled to the plurality of ridge based mm-wave filter portions and communicative coupled to a mm-wave waveguide bundle. In an embodiment the plurality of protrusions define resonant cavities with openings between 0.5 mm and 2.0 mm, the plurality of protrusions are spaced apart from each other by a spacing between 0.5 mm and 2.0 mm, and wherein the plurality of protrusions have a thickness between 200 μm and 1,000 μm.
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公开(公告)号:US20200286841A1
公开(公告)日:2020-09-10
申请号:US16843803
申请日:2020-04-08
Applicant: Intel Corporation
Inventor: Telesphor Kamgaing , Adel A. Elsherbini , Sasha Oster
IPC: H01L23/66 , H01L21/48 , H01L23/498
Abstract: In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.
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公开(公告)号:US20180277458A1
公开(公告)日:2018-09-27
申请号:US15992830
申请日:2018-05-30
Applicant: Intel Corporation
Inventor: Sasha Oster , Srikant Nekkanty , Joshua D. Heppner , Adel A. Elsherbini , Yoshihiro Tomita , Debendra Mallik , Shawna M. Liff , Yoko Sekihara
Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
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公开(公告)号:US20170164461A1
公开(公告)日:2017-06-08
申请号:US14962692
申请日:2015-12-08
Applicant: Intel Corporation
Inventor: Braxton Lathrop , Sasha Oster , Aleksandar Aleksov , Nadine L. Dabby
CPC classification number: H05K1/028 , H05K1/0283 , H05K1/0346 , H05K1/0366 , H05K1/0393 , H05K1/092 , H05K1/11 , H05K3/0058 , H05K3/12 , H05K3/1216 , H05K3/1275 , H05K3/281 , H05K2201/0129 , H05K2201/0133 , H05K2203/0191 , H05K2203/1545
Abstract: Apparatus and methods are provided for flexible, stretchable, wearable electronics. In an example, an apparatus for providing flexible and stretchable conductors can include a first elastomer layer, conductive ink applied to the first elastomer layer, and an adhesive layer, in cooperation with the first elastomer layer, configured to encapsulate the conductive ink, the adhesive layer further configured to allow the apparatus to be attached to a second apparatus.
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17.
公开(公告)号:US20150189797A1
公开(公告)日:2015-07-02
申请号:US14126271
申请日:2013-09-27
Applicant: Intel Corporation
Inventor: Sasha Oster , Sarah Haney , Weng Hong Teh , Feras Eid
CPC classification number: H05K9/0052 , B32B37/24 , B32B38/10 , B32B2037/243 , B32B2457/00 , B81B7/0029 , B81B7/0032 , B81B7/02 , B81C1/0023 , G06F1/182 , H01L21/568 , H01L23/552 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2924/12042 , H01L2924/14 , H01L2924/1434 , H01L2924/1461 , H05K1/115 , Y10T156/10 , H01L2924/00
Abstract: Magnetic field shielding material with high relative permeability incorporated into a build-up package, for example to restrict a field of a magnet integrated with the build-up to a target device configured to operate in the field. In embodiments, a first device is physically coupled to the build-up. In embodiments, a magnetic field shielding material is disposed in contact with the build-up and in proximity to the first device to restrict a magnetic field either to a region occupied by the first device or to a region exclusive of the first device. A field shielding material may be disposed within build-up near a permanent magnet also within the build-up to reduce exposure of another device, such as an IC, to the magnetic field without reducing MEMS device exposure.
Abstract translation: 具有高的相对磁导率的磁场屏蔽材料被并入到积聚封装中,例如将与积聚物集成的磁体的场限制到被配置为在现场操作的目标装置。 在实施例中,第一设备物理地耦合到建立。 在实施例中,磁场屏蔽材料设置成与积层接触并且靠近第一装置,以将磁场限制到由第一装置占据的区域或不包括第一装置的区域。 场屏蔽材料也可以在堆积物内的永磁体附近的堆积内设置,以减少诸如IC之类的其它器件(例如IC)的暴露,而不会降低MEMS器件的暴露。
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公开(公告)号:US11594801B2
公开(公告)日:2023-02-28
申请号:US16613070
申请日:2017-07-01
Applicant: Intel Corporation
Inventor: Georgios Dogiamis , Sasha Oster , Telesphor Kamgaing , Erich Ewy , Kenneth Shoemaker , Adel Elsherbini , Johanna Swan
IPC: B60R11/04 , H01P3/16 , B60R16/023 , B60W40/02
Abstract: Embodiments of the invention include autonomous vehicles and mm-wave systems for communication between components. In an embodiment the vehicle includes an electronic control unit (ECU). The ECU may include a printed circuit board (PCB) and a CPU die packaged on a CPU packaging substrate. In an embodiment, the CPU packaging substrate is electrically coupled to the PCB. The ECU may also include an external predefined interface electrically coupled to the CPU die. In an embodiment, an active mm-wave interconnect may include a dielectric waveguide, and a first connector coupled to a first end of the dielectric waveguide. In an embodiment, the first connector comprises a first mm-wave engine, and the first connector is electrically coupled to the external predefined interface. Embodiments may also include a second connector coupled to a second end of the dielectric waveguide, wherein the second connector comprises a second mm-wave engine.
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公开(公告)号:US11462810B2
公开(公告)日:2022-10-04
申请号:US17194022
申请日:2021-03-05
Applicant: Intel Corporation
Inventor: Telesphor Kamgaing , Sasha Oster , Georgios Dogiamis , Johanna Swan
Abstract: Embodiments of the invention include a mm-wave waveguide connector and methods of forming such devices. In an embodiment the mm-wave waveguide connector may include a plurality of mm-wave launcher portions, and a plurality of ridge based mm-wave filter portions each communicatively coupled to one of the mm-wave launcher portions. In an embodiment, the ridge based mm-wave filter portions each include a plurality of protrusions that define one or more resonant cavities. Additional embodiments may include a multiplexer portion communicatively coupled to the plurality of ridge based mm-wave filter portions and communicative coupled to a mm-wave waveguide bundle. In an embodiment the plurality of protrusions define resonant cavities with openings between 0.5 mm and 2.0 mm, the plurality of protrusions are spaced apart from each other by a spacing between 0.5 mm and 2.0 mm, and wherein the plurality of protrusions have a thickness between 200 μm and 1,000 μm.
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公开(公告)号:US20180097269A1
公开(公告)日:2018-04-05
申请号:US15282086
申请日:2016-09-30
Applicant: Intel Corporation
Inventor: Georgios C. Dogiamis , Sasha Oster , Telesphor Kamgaing , Adel A. Elsherbini , Johanna M. Swan , Shawna M. Liff , Aleksandar Aleksov , Brandon M. Rawlings , Richard J. Dischler
CPC classification number: H01P3/122 , G06F1/182 , H01P3/14 , H01P3/16 , H01P11/006
Abstract: An apparatus comprises a plurality of waveguides, wherein the waveguides include a dielectric material; an outer shell; and a supporting feature within the outer shell, wherein the waveguides are arranged separate from each other within the outer shell by the supporting feature.
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