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公开(公告)号:US09921640B2
公开(公告)日:2018-03-20
申请号:US13631092
申请日:2012-09-28
Applicant: INTEL CORPORATION
Inventor: Uwe Zillmann , Andre Schaefer , Ruchir Saraswat , Telesphor Kamgaing , Paul B. Fischer , Guido Droege
CPC classification number: G06F1/3296 , H01L2924/0002 , H05K1/0262 , H05K1/165 , Y02D10/172 , Y10T29/4913 , H01L2924/00
Abstract: Magnetically enhanced inductors integrated with microelectronic devices at chip-level. In embodiments, magnetically enhanced inductors include a through substrate vias (TSVs) with fill metal to carry an electrical current proximate to a magnetic layer disposed on a substrate through which the TSV passes. In certain magnetically enhanced inductor embodiments, a TSV fill metal is disposed within a magnetic material lining the TSV. In certain magnetically enhanced inductor embodiments, a magnetically enhanced inductor includes a plurality of interconnected TSVs disposed proximate to a magnetic material layer on a side of a substrate. In embodiments, voltage regulation circuitry disposed on a first side of a substrate is integrated with one or more magnetically enhanced inductors utilizing a TSV passing through the substrate. In further embodiments, integrated circuitry on a same substrate as the magnetically enhanced inductor, or on another substrate stacked thereon, completes the VR and/or is powered by the VR circuitry.
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公开(公告)号:US09911689B2
公开(公告)日:2018-03-06
申请号:US15038623
申请日:2013-12-23
Applicant: INTEL CORPORATION
Inventor: Kevin J. Lee , Ruchir Saraswat , Uwe Zillmann , Nicholas P. Cowley , Andre Schaefer , Rinkle Jain , Guido Droege
IPC: H01L21/48 , H01L23/522 , H01L21/768 , H01L49/02 , H01L25/065 , H01L23/48 , H01L21/822 , H01L23/492 , H01L23/498 , H01L27/06
CPC classification number: H01L23/5223 , H01L21/4846 , H01L21/486 , H01L21/4875 , H01L21/76898 , H01L21/8221 , H01L23/481 , H01L23/492 , H01L23/498 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L25/0657 , H01L27/0629 , H01L28/90 , H01L2225/06544 , H01L2924/0002 , H01L2924/00
Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).
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公开(公告)号:US09391453B2
公开(公告)日:2016-07-12
申请号:US13927227
申请日:2013-06-26
Applicant: Intel Corporation
Inventor: Guido Droege , Andre Schaefer , Uwe Zillmann
CPC classification number: H02J1/00 , G05F1/618 , G11C5/025 , G11C5/14 , G11C5/147 , G11C7/00 , H01L2924/19042 , H01L2924/19104 , H02M1/088
Abstract: An apparatus such as heterogeneous device includes at least a first die and a second die. The apparatus further includes a first inductive element, a second inductive element, and switch control circuitry. The switch control circuitry is disposed in the first die. The switch control circuitry controls current through the first inductive element to produce a first voltage. The first voltage powers the first die. The second inductive element is coupled to the first inductive element. The second inductive element produces a second voltage to power the second die. The first die and second die can be fabricated in accordance with different technologies and in which the first die and second die withstand different maximum voltages. A magnitude of the first voltage can be greater than a magnitude of the second voltage.
Abstract translation: 诸如异种装置的装置至少包括第一模具和第二模具。 该装置还包括第一电感元件,第二电感元件和开关控制电路。 开关控制电路设置在第一管芯中。 开关控制电路控制通过第一电感元件的电流以产生第一电压。 第一个电压为第一个模具供电。 第二电感元件耦合到第一电感元件。 第二电感元件产生第二电压以对第二管芯供电。 第一模具和第二模具可以根据不同的技术制造,并且其中第一模具和第二模具耐受不同的最大电压。 第一电压的大小可以大于第二电压的幅度。
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