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公开(公告)号:US11972785B2
公开(公告)日:2024-04-30
申请号:US17526646
申请日:2021-11-15
Applicant: International Business Machines Corporation
Inventor: Pouya Hashemi , Jonathan Zanhong Sun , Guohan Hu , Saba Zare
CPC classification number: G11C11/161 , H01F10/3272 , H10B61/00 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85
Abstract: A memory structure, i.e., magnetoresistive random access memory (MRAM) structure, is provided that includes a seeding area including at least a tunnel barrier seed layer located beneath a chemical templating layer that is wider than the magnetic tunnel junction (MTJ) structure that is located on the chemical templating layer. Redeposited metallic material is located on at least a sidewall of the tunnel barrier seed layer of the seeding area so as to shunt that area of the structure. The memory structure has reduced resistance with minimal tunnel magnetoresistance (TMR) loss penalty.
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公开(公告)号:US11664059B2
公开(公告)日:2023-05-30
申请号:US17336994
申请日:2021-06-02
Applicant: International Business Machines Corporation
Inventor: Dimitri Houssameddine , Saba Zare , Heng Wu , Karthik Yogendra
CPC classification number: G11C11/161 , G11C11/1673 , G11C11/1675 , G11C27/005 , H01F10/3254 , H01F10/3286 , H10N50/01 , H10N50/80
Abstract: A memory system may include a magnetic tunnel junction stack, a first high resistance tunnel barrier, and a first voltage controlled magnetic anisotropy write layer. The first voltage controlled magnetic anisotropy write layer may be adjacent the high resistance tunnel barrier, and the voltage controlled magnetic anisotropy write line may include a magnetic material in direct contact with a high resistance tunnel barrier.
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公开(公告)号:US20220238794A1
公开(公告)日:2022-07-28
申请号:US17248479
申请日:2021-01-27
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Michael Rizzolo , Saba Zare , Virat Vasav Mehta , Eric Raymond Evarts
Abstract: An embodiment of the invention may include a magnetic random-access memory (MRAM) structure and method of making the structure. The MRAM structure may include a magnetic tunnel junction stack. The MRAM structure may include a magnetic liner located between the magnetic tunnel junction stack and a top contact, where the magnetic liner may be a ferromagnetic material. This may enable the magnetic liner to act as an independent variable to balance many of the magnetic parameters in the MTJ film stack in order to achieve zero magnetic field at the MTJ layer.
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公开(公告)号:US20210399212A1
公开(公告)日:2021-12-23
申请号:US16903516
申请日:2020-06-17
Applicant: International Business Machines Corporation
Inventor: Saba Zare , Michael Rizzolo , Mona A. Ebrish , Theodorus E. Standaert
Abstract: A method of manufacturing a magnetic random access memory device includes depositing a liner on an intermediate device including an opening in a sacrificial dielectric layer, depositing a conductive metal over the liner and in the opening, removing a portion of the conductive metal while preserving the liner and a thickness of the sacrificial dielectric layer, removing a first portion of the liner by etching, wherein the liner is recessed into the opening, depositing a plurality of metallic tunnel junction layers, forming a hardmask on the plurality of metallic tunnel junction layers, and patterning the metallic tunnel junction layers to form a metallic tunnel junction stack and simultaneously clear a second portion of the liner and a portion the sacrificial dielectric layer.
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公开(公告)号:US10892404B1
公开(公告)日:2021-01-12
申请号:US16506459
申请日:2019-07-09
Applicant: International Business Machines Corporation
Inventor: Ashim Dutta , Saba Zare , Michael Rizzolo , Theodorus E. Standaert , Daniel Charles Edelstein
Abstract: A method of forming a semiconductor structure includes forming a dielectric layer surrounding contacts over a top surface and bevel edge of a substrate, forming a sacrificial buffer layer over the dielectric layer, removing portions of the sacrificial buffer layer formed over the dielectric layer on the top surface of the substrate, and patterning device structures including one or more metal layers over the contacts, wherein patterning the device structures removes portions of the metal layers formed over the top surface of the substrate leaving the metal layers on the bevel edge. The method also includes forming an encapsulation layer and performing a bevel dry etch to remove the encapsulation layer and the metal layers on the bevel edge. The bevel dry etch damages the sacrificial buffer layer on the bevel edge underneath the metal layers. The method further includes removing the damaged sacrificial buffer layer from the bevel edge.
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公开(公告)号:US11823724B2
公开(公告)日:2023-11-21
申请号:US17510436
申请日:2021-10-26
Applicant: International Business Machines Corporation
Inventor: Saba Zare , Dimitri Houssameddine , Karthik Yogendra , Heng Wu
CPC classification number: G11C11/161 , G11C11/1655 , G11C11/1673 , G11C11/1697 , H10B61/00 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85
Abstract: A device includes a Magnetic Tunnel Junction (MTJ) memory element comprising, a reference layer, a free layer, and a magnetic tunneling layer between the reference layer and the free layer; and a pair of magneto-electric controlling layers, which have in-plane uniaxial anisotropy, wherein the pair of magneto-electric controlling layers are disposed below the free layer.
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公开(公告)号:US11569442B2
公开(公告)日:2023-01-31
申请号:US16903516
申请日:2020-06-17
Applicant: International Business Machines Corporation
Inventor: Saba Zare , Michael Rizzolo , Mona A. Ebrish , Theodorus E. Standaert
Abstract: A method of manufacturing a magnetic random access memory device includes depositing a liner on an intermediate device including an opening in a sacrificial dielectric layer, depositing a conductive metal over the liner and in the opening, removing a portion of the conductive metal while preserving the liner and a thickness of the sacrificial dielectric layer, removing a first portion of the liner by etching, wherein the liner is recessed into the opening, depositing a plurality of metallic tunnel junction layers, forming a hardmask on the plurality of metallic tunnel junction layers, and patterning the metallic tunnel junction layers to form a metallic tunnel junction stack and simultaneously clear a second portion of the liner and a portion the sacrificial dielectric layer.
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公开(公告)号:US20220383921A1
公开(公告)日:2022-12-01
申请号:US17331008
申请日:2021-05-26
Applicant: International Business Machines Corporation
Inventor: Michael Rizzolo , Saba Zare , Virat Vasav Mehta , Eric Raymond Evarts
Abstract: Provided is a magnetoresistive random-access memory (MRAM) cell. The MRAM cell comprises a top contact, a hard mask layer below the top contact, and a magnetic tunnel junction (MTJ) below the hard mask layer. The MRAM cell further comprises a diffusion barrier below the MTJ, a bottom contact below the diffusion barrier, and a magnetic liner arranged around the bottom contact.
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公开(公告)号:US20220180911A1
公开(公告)日:2022-06-09
申请号:US17247306
申请日:2020-12-07
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Saba Zare , Michael Rizzolo , Virat Vasav Mehta , Eric Raymond Evarts , Theodorus E. Standaert
Abstract: An apparatus comprising a magnetic tunnel junction (MTJ), a diffusion barrier, wherein the MTJ is located on the diffusion barrier and a bottom contact that includes a magnetic field generating component, wherein the diffusion barrier is located on top of the bottom contact, wherein the magnetic field generated by the magnetic field generating component affects the stability of the MTJ.
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公开(公告)号:US20210013400A1
公开(公告)日:2021-01-14
申请号:US16506459
申请日:2019-07-09
Applicant: International Business Machines Corporation
Inventor: Ashim Dutta , Saba Zare , Michael Rizzolo , Theodorus E. Standaert , Daniel Charles Edelstein
Abstract: A method of forming a semiconductor structure includes forming a dielectric layer surrounding contacts over a top surface and bevel edge of a substrate, forming a sacrificial buffer layer over the dielectric layer, removing portions of the sacrificial buffer layer formed over the dielectric layer on the top surface of the substrate, and patterning device structures including one or more metal layers over the contacts, wherein patterning the device structures removes portions of the metal layers formed over the top surface of the substrate leaving the metal layers on the bevel edge. The method also includes forming an encapsulation layer and performing a bevel dry etch to remove the encapsulation layer and the metal layers on the bevel edge. The bevel dry etch damages the sacrificial buffer layer on the bevel edge underneath the metal layers. The method further includes removing the damaged sacrificial buffer layer from the bevel edge.
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