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公开(公告)号:US20230154513A1
公开(公告)日:2023-05-18
申请号:US17526646
申请日:2021-11-15
发明人: Pouya Hashemi , Jonathan Zanhong Sun , Guohan Hu , Saba Zare
CPC分类号: G11C11/161 , H01L43/08 , H01L43/10 , H01L43/12 , H01L43/02 , H01F10/3272 , H01L27/222
摘要: A memory structure, i.e., magnetoresistive random access memory (MRAM) structure, is provided that includes a seeding area including at least a tunnel barrier seed layer located beneath a chemical templating layer that is wider than the magnetic tunnel junction (MTJ) structure that is located on the chemical templating layer. Redeposited metallic material is located on at least a sidewall of the tunnel barrier seed layer of the seeding area so as to shunt that area of the structure. The memory structure has reduced resistance with minimal tunnel magnetoresistance (TMR) loss penalty.
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公开(公告)号:US20210226120A1
公开(公告)日:2021-07-22
申请号:US16748738
申请日:2020-01-21
IPC分类号: H01L43/12
摘要: Form a metallized layer at a top surface of a semiconductor wafer. The metallized layer includes a bottom contact and a dielectric barrier surrounding the bottom contact. Deposit a memory stack layer onto the metallized layer. The memory stack layer forms a first overspill on a bevel of the wafer. Remove the first overspill from the bevel using a first high-angle ion beam during a cleanup etch.
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公开(公告)号:US11942126B2
公开(公告)日:2024-03-26
申请号:US17331008
申请日:2021-05-26
摘要: Provided is a magnetoresistive random-access memory (MRAM) cell. The MRAM cell comprises a top contact, a hard mask layer below the top contact, and a magnetic tunnel junction (MTJ) below the hard mask layer. The MRAM cell further comprises a diffusion barrier below the MTJ, a bottom contact below the diffusion barrier, and a magnetic liner arranged around the bottom contact.
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公开(公告)号:US11665974B2
公开(公告)日:2023-05-30
申请号:US17248479
申请日:2021-01-27
摘要: An embodiment of the invention may include a magnetic random-access memory (MRAM) structure and method of making the structure. The MRAM structure may include a magnetic tunnel junction stack. The MRAM structure may include a magnetic liner located between the magnetic tunnel junction stack and a top contact, where the magnetic liner may be a ferromagnetic material. This may enable the magnetic liner to act as an independent variable to balance many of the magnetic parameters in the MTJ film stack in order to achieve zero magnetic field at the MTJ layer.
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公开(公告)号:US20230031478A1
公开(公告)日:2023-02-02
申请号:US17444176
申请日:2021-07-30
发明人: Heng Wu , Dimitri Houssameddine , Saba Zare , Karthik Yogendra
摘要: A memory device with in-array magnetic shield includes an electrically conductive structure embedded within an interconnect dielectric material located above a first metal layer. The electrically conductive structure includes a bottom electrode. The memory device further includes a magnetic tunnel junction stack located above the bottom electrode, a dielectric filling layer surrounding the magnetic tunnel junction stack, one or more connecting vias extending through the dielectric filling layer and the interconnect dielectric material until a top portion of the first metal layer, and one or more dummy vias located between the one or more connecting vias and the magnetic tunnel junction stack for conducting an external magnetic field around the memory device.
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公开(公告)号:US20230240148A1
公开(公告)日:2023-07-27
申请号:US17648816
申请日:2022-01-25
发明人: Karthik Yogendra , Heng Wu , Saba Zare , Dimitri Houssameddine
CPC分类号: H01L43/12 , H01L27/222 , H01L43/02 , G11C11/161 , G11C11/1675
摘要: A semiconductor device including a magnetic tunnel junction (MTJ) stack, a first metal line above the MTJ stack and a magnetoelectric material layer above the first metal line. A semiconductor device including an array of magnetic tunnel junction (MTJ) stacks, a first metal line connected physically and electrically to a top electrode of each MTJ stack in a row of the array of MTJ stacks and a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line. A method including forming an array of magnetic tunnel junction (MTJ) stacks, forming a first metal line above a row of the array of MTJ stacks, and forming a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line.
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公开(公告)号:US20230131445A1
公开(公告)日:2023-04-27
申请号:US17510436
申请日:2021-10-26
发明人: Saba Zare , Dimitri Houssameddine , Karthik Yogendra , Heng Wu
摘要: A device includes a Magnetic Tunnel Junction (MTJ) memory element comprising, a reference layer, a free layer, and a magnetic tunneling layer between the reference layer and the free layer; and a pair of magneto-electric controlling layers, which have in-plane uniaxial anisotropy, wherein the pair of magneto-electric controlling layers are disposed below the free layer.
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公开(公告)号:US20220392504A1
公开(公告)日:2022-12-08
申请号:US17336994
申请日:2021-06-02
发明人: Dimitri Houssameddine , Saba Zare , Heng Wu , Karthik Yogendra
摘要: A memory system may include a magnetic tunnel junction stack, a first high resistance tunnel barrier, and a first voltage controlled magnetic anisotropy write layer. The first voltage controlled magnetic anisotropy write layer may be adjacent the high resistance tunnel barrier, and the voltage controlled magnetic anisotropy write line may include a magnetic material in direct contact with a high resistance tunnel barrier.
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公开(公告)号:US11081643B1
公开(公告)日:2021-08-03
申请号:US16748738
申请日:2020-01-21
摘要: Form a metallized layer at a top surface of a semiconductor wafer. The metallized layer includes a bottom contact and a dielectric barrier surrounding the bottom contact. Deposit a memory stack layer onto the metallized layer. The memory stack layer forms a first overspill on a bevel of the wafer. Remove the first overspill from the bevel using a first high-angle ion beam during a cleanup etch.
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公开(公告)号:US11972785B2
公开(公告)日:2024-04-30
申请号:US17526646
申请日:2021-11-15
发明人: Pouya Hashemi , Jonathan Zanhong Sun , Guohan Hu , Saba Zare
CPC分类号: G11C11/161 , H01F10/3272 , H10B61/00 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85
摘要: A memory structure, i.e., magnetoresistive random access memory (MRAM) structure, is provided that includes a seeding area including at least a tunnel barrier seed layer located beneath a chemical templating layer that is wider than the magnetic tunnel junction (MTJ) structure that is located on the chemical templating layer. Redeposited metallic material is located on at least a sidewall of the tunnel barrier seed layer of the seeding area so as to shunt that area of the structure. The memory structure has reduced resistance with minimal tunnel magnetoresistance (TMR) loss penalty.
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