公开(公告)号：US20190165151A1

公开(公告)日：2019-05-30

申请号：US16202567

申请日：2018-11-28

Applicant: Infineon Technologies AG

Inventor： Oana Julia Spulber ,  Matthias Kuenle ,  Wolfgang Roesner ,  Christian Philipp Sandow ,  Christoph Weiss

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06 ,  H01L21/265

Abstract: An embodiment relates to a method of manufacturing an insulated gate bipolar transistor in a semiconductor body. A first field stop zone portion of a first conductivity type is formed on a semiconductor substrate. A second field stop zone portion of the first conductivity type is formed on the first field stop zone portion. A drift zone of the first conductivity type is formed on the second field stop zone portion. A doping concentration in the drift zone is smaller than 1013 cm−3 along a vertical extension of more than 30% of a thickness of the semiconductor body upon completion of the insulated gate bipolar transistor.

公开(公告)号：US20190157401A1

公开(公告)日：2019-05-23

申请号：US16235726

申请日：2018-12-28

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Daniel Schloegl ,  Hans-Joachim Schulze ,  Christoph Weiss

IPC: H01L29/36 ,  H01L29/861 ,  H01L29/66 ,  H01L21/265 ,  H01L29/08 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/36 ,  H01L21/265 ,  H01L29/0804 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66674 ,  H01L29/66712 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/861

Abstract: A method of manufacturing a power semiconductor device includes: creating a doped contact region on top of a surface of a carrier; creating, on top of the contact region, a doped transition region having a maximum dopant concentration of at least 0.5*1015 cm−3 for at least 70% of a total extension of the doped transition region in an extension direction and a maximal dopant concentration gradient of at most 3*1022 cm−4, wherein a lower subregion of the doped transition region is in contact with the contact region and has a maximum dopant concentration at least 100 times higher than a maximum dopant concentration of an upper subregion of the doped transition region; and creating a doped drift region on top of the upper subregion of the doped transition region, the doped drift region having a lower dopant concentration than the upper subregion of the doped transition region.

公开(公告)号：US09647083B2

公开(公告)日：2017-05-09

申请号：US15142992

申请日：2016-04-29

Applicant: Infineon Technologies AG

Inventor： Daniel Schloegl ,  Johannes Baumgartl ,  Matthias Kuenle ,  Erwin Lercher ,  Hans-Joachim Schulze ,  Christoph Weiss

IPC: H01L29/74 ,  H01L31/111 ,  H01L29/66 ,  H01L29/739 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L21/283 ,  H01L21/265

CPC classification number: H01L29/7395 ,  H01L21/0257 ,  H01L21/0262 ,  H01L21/265 ,  H01L21/266 ,  H01L21/283 ,  H01L29/0634 ,  H01L29/0688 ,  H01L29/0804 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/36 ,  H01L29/6606 ,  H01L29/6609 ,  H01L29/66204 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/861 ,  H01L29/868

Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn). Epitaxially growing the drift layer includes creating, within the drift layer, a dopant concentration profile (P) of dopants of the first conductivity type along the vertical direction (Z), the dopant concentration profile (P) in the drift layer exhibiting a variation of a concentration of dopants of the first conductivity type along the vertical direction (Z).

公开(公告)号：US09443971B2

公开(公告)日：2016-09-13

申请号：US14940797

申请日：2015-11-13

Applicant: Infineon Technologies AG

Inventor： Andreas Haertl ,  Frank Hille ,  Francisco Javier Santos Rodriguez ,  Daniel Schloegl ,  Andre Rainer Stegner ,  Christoph Weiss

IPC: H01L29/00 ,  H01L21/22 ,  H01L21/38 ,  H01L29/78 ,  H01L29/739 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/063 ,  H01L21/26506 ,  H01L21/28568 ,  H01L29/0607 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/32 ,  H01L29/36 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66136 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66674 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7801 ,  H01L29/861

Abstract: A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region in contact with the diffusion barrier layer, the contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing the lifetime and/or the mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

Abstract translation: 半导体器件包括扩散阻挡层，具有第一导电类型的第一电荷载流子的第一半导体区域和具有第二电荷载流子的第二半导体区域。 第一半导体区域包括与第二半导体区域接触的过渡区域，过渡区域具有第一电荷载流子的第一浓度，与扩散阻挡层接触的接触区域，接触区域具有第一浓度的第一 电荷载体，其中第二浓度高于第一浓度，以及在接触区域和过渡区域之间的损伤区域。 损伤区域被配置为与接触区域和过渡区域的第一电荷载流子的寿命和/或迁移率相比，减小损伤区域的第一电荷载流子的寿命和/或迁移率。

公开(公告)号：US20150303260A1

公开(公告)日：2015-10-22

申请号：US14679514

申请日：2015-04-06

Applicant: Infineon Technologies AG

Inventor： Franz Josef Niedernostheide ,  Manfred Pfaffenlehner ,  Hans-Joachim Schulze ,  Holger Schulze ,  Frank Umbach ,  Christoph Weiss

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/861 ,  H01L21/283 ,  H01L29/66 ,  H01L23/31 ,  H01L21/56 ,  H01L29/739 ,  H01L29/40

CPC classification number: H01L29/0696 ,  H01L23/3157 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/66128 ,  H01L29/66333 ,  H01L29/6634 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7811 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.

Abstract translation: 半导体本体包括第一和第二相对表面，沿基本上垂直于第一表面的垂直方向延伸的边缘，有效区域，沿着基本上平行于有效区域和边缘之间的第一表面的水平方向布置的外围区域，以及 从有源区延伸到周边区域的pn结。 在外围区域中，半导体器件还包括邻近第一表面布置的第一导电区域，邻近第一表面设置并沿第一导电区域和边缘之间的水平方向布置的第二导电区域，以及包括 至少部分地覆盖所述第一导电区域的第一部分，至少部分地覆盖所述第二导电区域的第二部分。 第一部分具有不同于第二部分的层组成和/或与第二部分的厚度不同的厚度。