公开(公告)号：US10211158B2

公开(公告)日：2019-02-19

申请号：US14529371

申请日：2014-10-31

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Juergen Hoegerl ,  Gottfried Beer ,  Magdalena Hoier ,  Georg Meyer-Berg

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498

Abstract: A power semiconductor module includes a direct copper bonded (DCB) substrate having a ceramic substrate, a first copper metallization bonded to a first main surface of the ceramic substrate and a second copper metallization bonded to a second main surface of the ceramic substrate opposite the first main surface. The power semiconductor module further includes a power semiconductor die attached the first copper metallization, a passive component attached the first copper metallization, a first isolation layer encapsulating the power semiconductor die and the passive component, a first structured metallization layer on the first isolation layer, and a first plurality of electrically conductive vias extending through the first isolation layer from the first structured metallization layer to the power semiconductor die and the passive component. An integrated power module and a method of manufacturing the integrated power module are also provided.

公开(公告)号：US09196510B2

公开(公告)日：2015-11-24

申请号：US14077694

申请日：2013-11-12

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Juergen Hoegerl ,  Gottfried Beer ,  Magdalena Hoier

IPC: H01L21/56 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/563 ,  H01L23/3107 ,  H01L23/3135 ,  H01L24/24 ,  H01L24/82 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/12043 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor package includes a mold body having a first main face, a second main face opposite to the first main face and side faces connecting the first and second main faces, a first semiconductor module including a plurality of first semiconductor chips and a first encapsulation layer disposed above the first semiconductor chips, and a second semiconductor module disposed above the first semiconductor module. The second semiconductor module includes a plurality of second semiconductor channels and a second encapsulation layer disposed above the second semiconductor channels. The semiconductor package further includes a plurality of external connectors extending through one or more of the side faces of the mold body.

Abstract translation: 半导体封装包括具有第一主面，与第一主面相对的第二主面和连接第一主面和第二主面的侧面的模体，包括多个第一半导体芯片的第一半导体模块和第一封装层 设置在第一半导体芯片上方，以及设置在第一半导体模块上方的第二半导体模块。 第二半导体模块包括多个第二半导体沟道和设置在第二半导体沟道上方的第二封装层。 半导体封装还包括延伸穿过模具主体的一个或多个侧面的多个外部连接器。

公开(公告)号：US20150124420A1

公开(公告)日：2015-05-07

申请号：US14071296

申请日：2013-11-04

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Peter Scherl ,  Magdalena Hoier ,  Hans-Joerg Timme

IPC: H05K1/11 ,  H05K3/36 ,  H05K1/14

CPC classification number: H05K1/11 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/45028 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45184 ,  H01L2224/4554 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48511 ,  H01L2224/85 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/181 ,  H05K1/111 ,  H05K1/14 ,  H05K3/32 ,  H05K3/36 ,  H05K3/4015 ,  H05K2201/04 ,  H05K2203/0285 ,  Y10T29/49126 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2224/48247 ,  H01L2224/43 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An electronic device may comprise a semiconductor element and a wire bond connecting the semiconductor element to a substrate. Using a woven bonding wire may improve the mechanical and electrical properties of the wire bond. Furthermore, there may be a cost benefit. Woven bonding wires may be used in any electronic device, for example in power devices or integrated logic devices.

Abstract translation: 电子器件可以包括半导体元件和将半导体元件连接到衬底的引线键合。 使用编织的接合线可以改善引线接合的机械和电学性质。 此外，可能会有成本效益。 编织接合线可用于任何电子设备中，例如功率器件或集成逻辑器件中。