公开(公告)号：US10042807B2

公开(公告)日：2018-08-07

申请号：US15091337

申请日：2016-04-05

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  David Astrom ,  Eric Pihet

IPC: G06F13/20 ,  G06F13/40 ,  G06F1/26 ,  G06F1/32 ,  G06F13/42

Abstract: Systems, devices, methods, and techniques for bus receivers operable to provide a data output corresponding to a voltage differential provided on a two-conductor data bus. In one example, a bus receiver comprises a four-quadrant input circuit and a gain stage coupled to the four-quadrant input circuit. In various examples, the four-quadrant input circuit is operable to provide common mode current compensation based on a common mode voltage present on the two-conductor data bus.

公开(公告)号：US09791887B2

公开(公告)日：2017-10-17

申请号：US14142161

申请日：2013-12-27

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  Markus Hopfner

IPC: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42

CPC classification number: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42 ,  G06F13/423

Abstract: A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined.

公开(公告)号：US11754640B2

公开(公告)日：2023-09-12

申请号：US17219059

申请日：2021-03-31

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher ,  Hermann Gruber ,  Thorsten Hinderer

IPC: G01R31/62 ,  H01F27/40 ,  H01F27/29

CPC classification number: G01R31/62 ,  H01F27/29 ,  H01F27/40

Abstract: A device including a first voltage domain and a second voltage domain is provided, the voltage domains being separated by an isolation barrier. In addition, the device includes a scratch detection circuit including a first and a second electrode at a distance of less than 2 μm.

公开(公告)号：US20230136057A1

公开(公告)日：2023-05-04

申请号：US17518141

申请日：2021-11-03

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  Andrei Negoita

IPC: H03F3/45 ,  H03F3/72 ,  H03F1/26

Abstract: A differential feedback circuit with an active noise cancelation technique using a dual input differential pair. In the differential feedback circuit, a feedback voltage and a reference voltage connect to a primary input pair. Sensed noise at the inputs is put to a secondary input pair of the differential amplifier, which is inverted with respect to the primary input pair. In other words, the reference voltage, which may be subject to noise, connects directly to one terminal of the secondary input pair and through a low-pass filter to another terminal of the secondary input pair so that the noise, which may be coupled to the differential feedback circuit, cancels at the output of the differential feedback circuit.

公开(公告)号：US11152288B2

公开(公告)日：2021-10-19

申请号：US16394557

申请日：2019-04-25

Applicant: Infineon Technologies AG

Inventor： Eric Lopez Bonifacio ,  Thorsten Hinderer ,  Fortunato Lopez ,  Norliza Morban

IPC: H01L23/495 ,  H01L23/31 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

Abstract: A lead frame includes a first die paddle, a second die paddle, a first lead, a second lead, and a third lead. The first lead is coupled to a first side of the first die paddle. The second lead is coupled to a second side of the first die paddle opposite to the first side of the first die paddle. The third lead is coupled to a first side of the second die paddle. At least one of the first lead, the second lead, and the third lead is coupled to the corresponding die paddle via a zigzag shaped tie bar.

公开(公告)号：US20210318392A1

公开(公告)日：2021-10-14

申请号：US17219059

申请日：2021-03-31

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher ,  Hermann Gruber ,  Thorsten Hinderer

IPC: G01R31/62 ,  H01F27/29 ,  H01F27/40

Abstract: A device including a first voltage domain and a second voltage domain is provided, the voltage domains being separated by an isolation barrier. In addition, the device includes a scratch detection circuit including a first and a second electrode at a distance of less than 2 μm.

公开(公告)号：US20190244951A1

公开(公告)日：2019-08-08

申请号：US15890102

申请日：2018-02-06

Applicant: Infineon Technologies AG

Inventor： Ulrich Glaser ,  Thorsten Hinderer

IPC: H01L27/02 ,  H02H9/04 ,  H01L23/60

CPC classification number: H01L27/0255 ,  H01L23/60 ,  H01L27/0259 ,  H01L27/0285 ,  H02H9/041 ,  H02H9/043 ,  H02H9/046

Abstract: A circuit includes electrostatic discharge (ESD) protection circuitry, triggering circuitry, transient detection circuitry, and deactivation circuitry. The ESD protection circuitry is coupled between a first rail and a second rail. The triggering circuitry is configured to generate an ESD activation signal when a voltage across the first rail and the second rail exceeds a voltage threshold. The ESD protection circuitry is configured to activate based on the ESD activation signal. The transient detection circuitry is configured to generate a deactivation signal when the voltage across the first rail and the second rail comprises a voltage change over time that is less than a transient threshold. The deactivation circuitry is configured to deactivate the triggering circuitry based on the deactivation signal.

公开(公告)号：US20180341615A1

公开(公告)日：2018-11-29

申请号：US16052371

申请日：2018-08-01

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  David Astrom ,  Eric Pihet

IPC: G06F13/40 ,  G06F13/42 ,  G06F1/26 ,  G06F1/32

CPC classification number: G06F13/4072 ,  G06F1/266 ,  G06F1/3296 ,  G06F13/4086 ,  G06F13/4282

Abstract: Systems, devices, methods, and techniques for bus receivers operable to provide a data output corresponding to a voltage differential provided on a two-conductor data bus. In one example, a bus receiver comprises a four-quadrant input circuit and a gain stage coupled to the four-quadrant input circuit. In various examples, the four-quadrant input circuit is operable to provide common mode current compensation based on a common mode voltage present on the two-conductor data bus.

公开(公告)号：US20170286347A1

公开(公告)日：2017-10-05

申请号：US15091337

申请日：2016-04-05

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  David Astrom ,  Eric Pihet

IPC: G06F13/40 ,  G06F1/32 ,  G06F1/26 ,  G06F13/42

CPC classification number: G06F13/4072 ,  G06F1/266 ,  G06F1/3296 ,  G06F13/4086 ,  G06F13/4282

Abstract: Systems, devices, methods, and techniques are disclosed for bus receivers operable to provide a data output corresponding to a voltage differential provided on a two-conductor data bus. In one example, a bus receiver comprises a four-quadrant input circuit and a gain stage coupled to the four-quadrant input circuit. In various examples, the four-quadrant input circuit is operable to provide common mode current compensation based on a common mode voltage present on the two-conductor data bus.

公开(公告)号：US09760111B2

公开(公告)日：2017-09-12

申请号：US14142161

申请日：2013-12-27

Applicant: Infineon Technologies AG

Inventor： Thorsten Hinderer ,  Markus Hopfner

IPC: G06F1/04 ,  G06F1/06 ,  G06F1/12 ,  G06F13/42

Abstract: A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined.