公开(公告)号：US11587843B2

公开(公告)日：2023-02-21

申请号：US16219158

申请日：2018-12-13

Applicant: Intel Corporation

Inventor： Prasad Ramanathan ,  Nicholas Neal ,  Chandra Mohan Jha

IPC: H01L23/34 ,  H01L23/52 ,  H01L23/367 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L23/00 ,  H01L23/373

Abstract: Integrated circuit IC package with one or more IC dies including solder features that are thermally coupled to the IC. The thermally coupled solder features (e.g., bumps) may be electrically insulated from solder features electrically coupled to the IC, but interconnected with each other by one or more metallization layers within a plane of the IC package. An in-plane interconnected network of thermal solder features may improve lateral heat transfer, for example spreading heat from one or more hotspots on the IC die. An under-bump metallization (UBM) may interconnect two or more thermal solder features. A through-substrate via (TSV) metallization may interconnect two or more thermal solder features. A stack of IC dies may include thermal solder features interconnected by metallization within one or more planes of the stack.

公开(公告)号：US20220384306A1

公开(公告)日：2022-12-01

申请号：US17330870

申请日：2021-05-26

Applicant: Intel Corporation

Inventor： Weihua Tang ,  Chandra Mohan Jha ,  Nicholas S. Haehn

IPC: H01L23/433 ,  H01L23/00

Abstract: A thermal interface structure for facilitating heat transfer from an integrated circuit device to a heat dissipation device may be fabricated to include at least one conductive wire structure wherein each conductive wire structure includes a conductive wire having a first end, a first barrier layer adjacent the first end of the conductive wire, and a first solder structure adjacent the first barrier layer. The thermal interface structure may further include an encapsulation material substantially encapsulating each conductive wire structure and a first solder layer abutting the encapsulation material and abutting the first solder structure of each conductive wire structure.

公开(公告)号：US11444003B2

公开(公告)日：2022-09-13

申请号：US16144584

申请日：2018-09-27

Applicant: INTEL CORPORATION

Inventor： Zhimin Wan ,  Chia-Pin Chiu ,  Chandra Mohan Jha ,  Weihua Tang ,  Shankar Devasenathipathy

IPC: H01L23/473 ,  H01L25/18 ,  H01L23/467 ,  H01L23/367 ,  H01L23/373

Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).

公开(公告)号：US20200312742A1

公开(公告)日：2020-10-01

申请号：US16370703

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Kelly Lofgreen ,  Chandra Mohan Jha ,  Krishna Vasanth Valavala

IPC: H01L23/38 ,  H01L23/48 ,  H01L23/00 ,  H01L25/18 ,  H01L35/10 ,  H01L35/34

Abstract: An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.

公开(公告)号：US12021016B2

公开(公告)日：2024-06-25

申请号：US16898196

申请日：2020-06-10

Applicant: Intel Corporation

Inventor： Chandra Mohan Jha ,  Pooya Tadayon ,  Aastha Uppal ,  Weihua Tang ,  Paul Diglio ,  Xavier Brun

IPC: H01L23/498 ,  H01L21/56 ,  H01L21/78 ,  H01L23/373 ,  H01L23/522

CPC classification number: H01L23/49833 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3732 ,  H01L23/3738 ,  H01L23/5226

Abstract: Embodiments disclosed herein comprise a die and methods of forming a die. In an embodiment, a die comprises, a die substrate, wherein the die substrate has a first thermal conductivity, and a first layer over the die substrate, wherein the first layer has a second thermal conductivity that is greater than the first thermal conductivity. In an embodiment, the die further comprises a second layer over the first layer, wherein the second layer comprises transistors.

公开(公告)号：US11978689B2

公开(公告)日：2024-05-07

申请号：US18089537

申请日：2022-12-27

Applicant: Intel Corporation

Inventor： Shrenik Kothari ,  Chandra Mohan Jha ,  Weihua Tang ,  Robert Sankman ,  Xavier Brun ,  Pooya Tadayon

IPC: H01L23/42 ,  H01L23/367 ,  H01L23/373 ,  H01L23/522 ,  H01L23/00 ,  H01L23/495 ,  H01L23/538 ,  H01L25/07

CPC classification number: H01L23/42 ,  H01L23/367 ,  H01L23/3738 ,  H01L23/522 ,  H01L23/49575 ,  H01L23/5384 ,  H01L24/20 ,  H01L25/072

Abstract: Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.

公开(公告)号：US11894282B2

公开(公告)日：2024-02-06

申请号：US16446538

申请日：2019-06-19

Applicant: Intel Corporation

Inventor： Zhimin Wan ,  Sergio Antonio Chan Arguedas ,  Peng Li ,  Chandra Mohan Jha ,  Aravindha R. Antoniswamy ,  Cheng Xu ,  Junnan Zhao ,  Ying Wang

IPC: H01L23/367 ,  H01L23/433 ,  H01L23/498 ,  H01L23/053

CPC classification number: H01L23/3675 ,  H01L23/053 ,  H01L23/433 ,  H01L23/49816

Abstract: Disclosed herein are vented lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A vent may extend between the interior surface and the exterior surface of the lid, and the vent may at least partially overlap the die.

公开(公告)号：US11854932B2

公开(公告)日：2023-12-26

申请号：US16721122

申请日：2019-12-19

Applicant: Intel Corporation

Inventor： Feras Eid ,  Chandra Mohan Jha ,  Je-Young Chang

IPC: H01L23/36 ,  H01L23/367 ,  H01L23/373 ,  H01L23/48

CPC classification number: H01L23/3672 ,  H01L23/373 ,  H01L23/481

Abstract: Embodiments disclosed herein include electronic packages and thermal solutions for such electronic packages. In an embodiment, an electronic package comprises, a package substrate with a first surface, a second surface opposite from the first surface, and a sidewall surface connecting the first surface to the second surface. In an embodiment, the electronic package further comprises a heat spreader, where a first portion of the heat spreader is attached to the first surface of the package substrate and a second portion of the heat spreader is attached to the second surface of the package substrate. In an embodiment, a third portion of the heat spreader adjacent to the sidewall surface of the package substrate connects the first portion of the heat spreader to the second portion of the heat spreader.

公开(公告)号：US11502017B2

公开(公告)日：2022-11-15

申请号：US16215237

申请日：2018-12-10

Applicant: INTEL CORPORATION

Inventor： Cheng Xu ,  Zhimin Wan ,  Lingtao Liu ,  Yikang Deng ,  Junnan Zhao ,  Chandra Mohan Jha ,  Kyu-oh Lee

IPC: H01L23/367 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.

公开(公告)号：US11456232B2

公开(公告)日：2022-09-27

申请号：US16100406

申请日：2018-08-10

Applicant: Intel Corporation

Inventor： Zhimin Wan ,  Je-Young Chang ,  Chia-Pin Chiu ,  Shankar Devasenathipathy ,  Betsegaw Kebede Gebrehiwot ,  Chandra Mohan Jha

IPC: H01L23/427 ,  H01L25/18

Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.