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公开(公告)号：US12238892B2
公开(公告)日：2025-02-25
申请号：US17128620
申请日：2020-12-21
Applicant: Intel Corporation
Inventor： Raanan Sover , James Williams , Bradley Smith , Nir Peled , Paul George , Jason Armstrong , Alexey Chinkov , Meir Cohen , Je-Young Chang , Kuang Liu , Ravindranath Mahajan , Kelly Lofgreen , Kyle Arrington , Michael Crocker , Sergio Antonio Chan Arguedas
IPC: H05K7/20
Abstract: A two-phase immersion cooling system for an integrated circuit assembly may be formed utilizing boiling enhancement structures formed on or directly attached to heat dissipation devices within the integrated circuit assembly, formed on or directly attached to integrated circuit devices within the integrated circuit assembly, and/or conformally formed over support devices and at least a portion of an electronic board within the integrated circuit assembly. In still a further embodiment, the two-phase immersion cooling system may include a low boiling point liquid including at least two liquids that are substantially immiscible with one another.
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公开(公告)号：US20220201889A1
公开(公告)日：2022-06-23
申请号：US17128620
申请日：2020-12-21
Applicant: Intel Corporation
Inventor： Raanan Sover , James Williams , Bradley Smith , Nir Peled , Paul George , Jason Armstrong , Alexey Chinkov , Meir Cohen , Je-Young Chang , Kuang Liu , Ravindranath Mahajan , Kelly Lofgreen , Kyle Arrington , Michael Crocker , Sergio Antonio Chan Arguedas
IPC: H05K7/20
Abstract: A two-phase immersion cooling system for an integrated circuit assembly may be formed utilizing boiling enhancement structures formed on or directly attached to heat dissipation devices within the integrated circuit assembly, formed on or directly attached to integrated circuit devices within the integrated circuit assembly, and/or conformally formed over support devices and at least a portion of an electronic board within the integrated circuit assembly. In still a further embodiment, the two-phase immersion cooling system may include a low boiling point liquid including at least two liquids that are substantially immiscible with one another.
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3.发明授权公开(公告)号：US11694942B2
公开(公告)日：2023-07-04
申请号：US16168534
申请日：2018-10-23
Applicant: Intel Corporation
Inventor： Kelly Lofgreen , Chandra Mohan Jha , Krishna Vasanth Valavala
IPC: H01L23/38 , H10N10/01 , H10N10/17 , H10N10/851 , H10N19/00 , H01L23/00 , H01L25/00 , H01L23/48 , H01L25/16
CPC classification number: H01L23/38 , H10N10/01 , H10N10/17 , H10N10/851 , H10N19/101 , H01L23/481 , H01L24/09 , H01L25/165 , H01L25/50 , H01L2924/1432 , H01L2924/1434
Abstract: An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.
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公开(公告)号：US20210125896A1
公开(公告)日：2021-04-29
申请号：US16662562
申请日：2019-10-24
Applicant: Intel Corporation
Inventor： Kyle J. Arrington , Aaron Mccann , Kelly Lofgreen , Aravindha R. Antoniswamy , Shankar Devasenathipathy
IPC: H01L23/373 , H01L23/532 , H01L21/48
Abstract: A thermal interface material may be formed comprising a liquid metal and a corrosion resistant filler material. The thermal interface material may be used in an integrated circuit assembly between at least one integrated circuit device and a heat dissipation device, wherein the corrosion resistant filler material changes the physical properties of the thermal interface material, which may prevent failure modes from occurring during the operation of the integrated circuit assembly and may assist in maintaining a bond line thickness between the at least one integrated circuit device and the heat dissipation device.
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公开(公告)号：US11756856B2
公开(公告)日：2023-09-12
申请号：US16149909
申请日：2018-10-02
Applicant: Intel Corporation
Inventor： Krishna Vasanth Valavala , Ravindranath Mahajan , Chandra Mohan Jha , Kelly Lofgreen , Weihua Tang
CPC classification number: H01L23/373 , H01L23/3114 , H01L23/38 , H01L25/18 , H01L29/43 , H10N10/17
Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11676883B2
公开(公告)日：2023-06-13
申请号：US16355596
申请日：2019-03-15
Applicant: Intel Corporation
Inventor： Javed Shaikh , Je-Young Chang , Kelly Lofgreen , Weihua Tang , Aastha Uppal
Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.
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公开(公告)号：US11869824B2
公开(公告)日：2024-01-09
申请号：US16672858
申请日：2019-11-04
Applicant: Intel Corporation
Inventor： Kyle J. Arrington , Aaron McCann , Kelly Lofgreen , Elah Bozorg-Grayeli , Aravindha Antoniswamy , Joseph B. Petrini
IPC: H01L23/373 , H01L23/00 , H01L25/00
CPC classification number: H01L23/3735 , H01L23/3733 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/00 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/32506 , H01L2224/73253
Abstract: A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.
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公开(公告)号：US11462457B2
公开(公告)日：2022-10-04
申请号：US16142366
申请日：2018-09-26
Applicant: Intel Corporation
Inventor： Krishna Vasanth Valavala , Kelly Lofgreen , Chandra-Mohan Jha
IPC: H01L23/38 , H01L21/48 , H01L23/367 , H01L25/065
Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to a first heat-conducting plate to be thermally coupled to a first heat source, a thermoelectric cooler (TEC) thermally coupled to the first plate, a second heat-conducting plate thermally coupled to the TEC and to be thermally coupled to a second heat source where the TEC is to at least partially thermally isolate the first plate from the second plate to reduce heat transfer from the first plate to the second plate.
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公开(公告)号：US20200312742A1
公开(公告)日：2020-10-01
申请号：US16370703
申请日：2019-03-29
Applicant: Intel Corporation
Inventor： Kelly Lofgreen , Chandra Mohan Jha , Krishna Vasanth Valavala
Abstract: An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
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公开(公告)号：US11658095B2
公开(公告)日：2023-05-23
申请号：US16370703
申请日：2019-03-29
Applicant: Intel Corporation
Inventor： Kelly Lofgreen , Chandra Mohan Jha , Krishna Vasanth Valavala
CPC classification number: H01L23/38 , H01L23/481 , H01L24/09 , H01L24/17 , H01L25/18 , H10N10/01 , H10N10/82 , H01L2924/1434
Abstract: An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
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