公开(公告)号：US20210232528A1

公开(公告)日：2021-07-29

申请号：US17208744

申请日：2021-03-22

Applicant: Intel Corporation

Inventor： Patrick G. KUTCH ,  Andrey CHILIKIN ,  Jin YU ,  Cunming LIANG ,  Changpeng LIU ,  Ziye YANG ,  Gang CAO ,  Xiaodong LIU ,  Zhiguo WEN ,  Zhihua CHEN

IPC: G06F13/40 ,  G06F9/445

Abstract: Examples described herein relate to an apparatus comprising: a descriptor format translator accessible to a driver. In some examples, the driver and descriptor format translator share access to transmit and receive descriptors. In some examples, based on a format of a descriptor associated with a device differing from a second format of descriptor associated with the driver, the descriptor format translator is to: perform a translation of the descriptor from the format to the second format and store the translated descriptor in the second format for access by the device. In some examples, the device is to access the translated descriptor; the device is to modify content of the translated descriptor to identify at least one work request; and the descriptor format translator is to translate the modified translated descriptor into the format and store the translated modified translated descriptor for access by the driver.

公开(公告)号：US20180129616A1

公开(公告)日：2018-05-10

申请号：US15573114

申请日：2015-06-24

Applicant: Intel Corporation

Inventor： Cunming LIANG ,  Danny Y. ZHOU ,  David E. COHEN ,  James R. HARRIS

IPC: G06F13/16 ,  G06F9/50 ,  G06F13/42 ,  G06F13/28

CPC classification number: G06F13/1668 ,  G06F3/00 ,  G06F9/5011 ,  G06F9/5077 ,  G06F13/28 ,  G06F13/4282 ,  G06F2009/45579 ,  G06F2213/0026

Abstract: Disclosed herein are systems and methods for isolating input/output computing resources. In some embodiments, a host device may include logic to identify a Process Address Space Identifier (PASID) for a process or container of the host device and logic to associate the PASID with an individual queue pair of a hardware device of the host device, wherein the queue pair includes two complementary queues and wherein the queue pair is owned by the process or container upon association with the PASID. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US20240184607A1

公开(公告)日：2024-06-06

申请号：US18388505

申请日：2023-11-09

Applicant: Intel Corporation

Inventor： Yigang ZHOU ,  Cunming LIANG

IPC: G06F9/455 ,  G06F12/0802 ,  G06F13/24 ,  G06F13/28

CPC classification number: G06F9/4555 ,  G06F9/45545 ,  G06F9/45558 ,  G06F12/0802 ,  G06F13/24 ,  G06F13/28 ,  G06F2009/4557 ,  G06F2009/45583 ,  G06F2009/45595 ,  G06F2213/3808

Abstract: An example electronic apparatus is for accelerating a para-virtualization network interface. The electronic apparatus includes a descriptor hub performing bi-directionally communication with a guest memory accessible by a guest and with a host memory accessible by a host. The guest includes a plurality of virtual machines. The host includes a plurality of virtual function devices. The virtual machines are communicatively coupled to the electronic apparatus through a central processing unit. The communication is based upon para-virtualization packet descriptors and network interface controller virtual function-specific descriptors. The electronic apparatus also includes a device association table communicatively coupled to the descriptor hub and to store associations between the virtual machines and the virtual function devices. The electronic apparatus further includes an input-output memory map unit (IOMMU) to perform direct memory access (DMA) remapping and interrupt remapping.

公开(公告)号：US20230053744A1

公开(公告)日：2023-02-23

申请号：US17981255

申请日：2022-11-04

Applicant: Intel Corporation

Inventor： Shaopeng HE ,  Cunming LIANG ,  Jiang YU ,  Ziye YANG ,  Ping YU ,  Bo CUI ,  Jingjing WU ,  Liang MA ,  Hongjun NI ,  Zhiguo WEN ,  Changpeng LIU ,  Anjali Singhai JAIN ,  Daniel DALY ,  Yadong LI

IPC: H04L49/9057 ,  H04L47/56 ,  H04L47/34 ,  H04L1/18 ,  H04L49/552

Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

公开(公告)号：US20220247696A1

公开(公告)日：2022-08-04

申请号：US17238893

申请日：2021-04-23

Applicant: Intel Corporation

Inventor： Shaopeng HE ,  Cunming LIANG ,  Jiang YU ,  Ziye YANG ,  Ping YU ,  Bo CUI ,  Jingjing WU ,  Liang MA ,  Hongjun NI ,  Zhiguo WEN ,  Changpeng LIU ,  Anjali Singhai JAIN ,  Daniel DALY ,  Yadong LI

IPC: H04L12/861 ,  H04L12/875 ,  H04L12/939 ,  H04L12/801 ,  H04L1/18

Abstract: Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.

公开(公告)号：US20190354387A1

公开(公告)日：2019-11-21

申请号：US16463473

申请日：2016-12-22

Applicant: INTEL CORPORATION

Inventor： Yigang ZHOU ,  Cunming LIANG

IPC: G06F9/455 ,  G06F13/28 ,  G06F13/24 ,  G06F12/0802

Abstract: An example electronic apparatus is for accelerating a para-virtualization network interface. The electronic apparatus includes a descriptor hub performing bi-directionally communication with a guest memory accessible by a guest and with a host memory accessible by a host. The guest includes a plurality of virtual machines. The host includes a plurality of virtual function devices. The virtual machines are communicatively coupled to the electronic apparatus through a central processing unit. The communication is based upon para-virtualization packet descriptors and network interface controller virtual function-specific descriptors. The electronic apparatus also includes a device association table communicatively coupled to the descriptor hub and to store associations between the virtual machines and the virtual function devices. The electronic apparatus further includes an input-output memory map unit (IOMMU) to perform direct memory access (DMA) remapping and interrupt remapping.