公开(公告)号：US20220345338A1

公开(公告)日：2022-10-27

申请号：US17754311

申请日：2019-12-23

Applicant: Intel Corporation

Inventor： Elan BANIN ,  Rotem BANIN ,  Ofir DEGANI ,  Eytan MANN

IPC: H04L25/49

Abstract: An apparatus for transmitting a bit in addition to a plurality of payload data symbols of a communication protocol is provided. The apparatus comprises an input interface configured to receive information about a bit value of the bit. Further, the apparatus comprises a transmission circuit configured to, if the bit value is a first value, transmit the plurality of payload data symbols at predetermined positions in a data signal as pulses of variable pulse length. The respective pulse length of each of the pulses is selected based on the symbol value of the payload data symbol represented by the respective pulse. If the bit value is a second value, the transmission circuit is configured to transmit a pulse exhibiting a pulse length being longer than a maximum payload data symbol pulse length defined in the communication protocol at the predetermined position of the pulse for the d-th payload data symbol of the plurality of payload data symbols, d=k+i if k+i≤z. d=([k+i] mod z) if k+i>z. k is the symbol value of the i-th payload data symbol of the plurality of payload data symbols, z is the number of possible symbol values of the payload data symbols defined in the communication protocol, and 1≤i≤z.

公开(公告)号：US20230209281A1

公开(公告)日：2023-06-29

申请号：US17560318

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Ofir DEGANI ,  Arnaud PIERRES ,  Oren HAGGAI ,  David BIRNBAUM ,  Amy CHEN ,  Revital ALMAGOR ,  Darryl ADAMS

IPC: H04R25/00

CPC classification number: H04R25/507 ,  H04R25/70 ,  H04R25/554 ,  H04R2225/55

Abstract: A communication device is provided including at least one processor coupled between a wireless communication terminal interface and an audio source; and a memory having a personal audibility feature (PAF) file stored therein and coupled to the processor, wherein the processor is configured to provide an audio stream to the wireless communication terminal interface based on a processed audio signal, determined using the audio source, wherein the processing corresponds to the information stored in the PAF file, the PAF file comprising personal auditability feature of a predetermined user and an audio reproduction feature of a predetermined terminal hearing device.

公开(公告)号：US20230090431A1

公开(公告)日：2023-03-23

申请号：US17810845

申请日：2022-07-06

Applicant: Intel Corporation

Inventor： Elan BANIN ,  Eytan MANN ,  Rotem BANIN ,  Ronen GERNIZKY ,  Ofir DEGANI ,  Igal KUSHNIR ,  Shahar PORAT ,  Amir RUBIN ,  Vladimir VOLOKITIN ,  Elinor KASHANI ,  Dmitry FELSENSTEIN ,  Ayal ESHKOLI ,  Tal DAVIDSON ,  Eng Hun OOI ,  Yossi TSFATI ,  Ran SHIMON

IPC: H04B1/04 ,  H04L7/033

Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

公开(公告)号：US20220407529A1

公开(公告)日：2022-12-22

申请号：US17763224

申请日：2019-12-26

Applicant: Intel Corporation

Inventor： Tzvi MAIMON ,  Ofir DEGANI ,  Assaf BEN-BASSAT ,  Anna NAZIMOV

IPC: H03M1/00 ,  H04B1/04

Abstract: A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. A number of capacitive digital analog converter (CDAC) cells of a power amplifier can be sized to provide defined power signals along a signal path. In response to an optimization component that is coupled to a CDAC cell of the plurality of CDAC cells operating in a high efficiency enable mode and the CDAC cell being powered off in an off mode, the optimization component can increase a power efficiency of the power amplifier by reducing an impedance of an output capacitor of the CDAC cell.

公开(公告)号：US20220201603A1

公开(公告)日：2022-06-23

申请号：US17472768

申请日：2021-09-13

Applicant: Intel Corporation

Inventor： Ofir KLEIN ,  Leor ROM ,  Eran SEGEV ,  Eran AMIR ,  Ofir DEGANI ,  Nevo IDAN ,  Chen KOJOKARO ,  Ronen KRONFELD ,  Sergey SOFER ,  Shahar WOLF

IPC: H04W52/02 ,  H04L27/00

Abstract: Various aspects provide a radiohead circuit and a communication device including the radiohead circuit. In an example, the radiohead circuit includes an antenna interface, a radio frequency front end configured to receive a channel scan information including an information related to a target communication channel to be scanned from a communication device processor, perform an energy scan for detecting an activity of the target communication channel based on the channel scan information, generate an activity information including an information as to whether there is the activity on the target communication channel, and provide the activity information to a communication interface; the communication interface configured to couple the processor to a radiohead circuit-external processor external to the radiohead circuit.

公开(公告)号：US20220201600A1

公开(公告)日：2022-06-23

申请号：US17126124

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Ehud RESHEF ,  Ofir DEGANI ,  Roya DOOSTNEJAD ,  Avishay FRIEDMAN ,  Nevo IDAN ,  Eytan MANN ,  Ashoke RAVI ,  Gadi SHOR ,  Shahar GROSS ,  Ofir KLEIN ,  Chen KOJOKARO

IPC: H04W48/18 ,  H04W88/06 ,  H04B1/00 ,  H04W72/02 ,  H04B7/0413 ,  H04B7/06

Abstract: In various aspects, a radio communication device is described including a housing, a plurality of radiohead circuits attached to the housing, baseband circuitry connected to the plurality of radiohead circuits via a digital interface; and one or more processors configured to select one or more radiohead circuits of the plurality of radiohead circuits for communication with another radio communication device to fulfill one or more predefined selection criteria with respect to a quality of a communication with the other radio communication device using the one or more selected radiohead circuits and to control the baseband circuitry to perform communication with the other radio communication device using the one or more selected radiohead circuits.

公开(公告)号：US20210265999A1

公开(公告)日：2021-08-26

申请号：US17059480

申请日：2019-08-05

Applicant: Intel Corporation

Inventor： Ofir DEGANI ,  Igal KUSHNIR ,  Elan BANIN ,  Rotem BANIN

IPC: H03L7/099 ,  H03L7/081 ,  H03L7/091 ,  H03B5/32 ,  H04B1/04

Abstract: An apparatus for generating an oscillation signal is provided. The apparatus includes a first oscillator configured to generate a first reference oscillation signal, and a second oscillator configured to generate a second reference oscillation signal. A frequency accuracy of the first oscillator is higher than a frequency accuracy of the second oscillator. Further, an oscillator phase noise of the second oscillator is lower than an oscillator phase noise of the first oscillator. The apparatus further includes a processing circuit configured to generate a third reference oscillation signal based on the first reference oscillation signal and the second reference oscillation signal. Additionally, the apparatus includes a phase-locked loop configured to generate the oscillation signal based on the third reference oscillation signal. A frequency of the oscillation signal is a multiple of a frequency of the third reference oscillation signal.

公开(公告)号：US20250007531A1

公开(公告)日：2025-01-02

申请号：US18343822

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Ofir DEGANI ,  Assaf BEN-BASSAT

IPC: H03M1/46 ,  H03M1/80

Abstract: Disclosed herein are devices, methods, and systems that relate to wireless communications architectures and, in particular, multi-band radio-frequency circuitry. Disclosed herein is a capacitive digital-to-analog converter (CDAC). The CDAC may include a plurality of circuits configured to receive a digital signal to be converted into an analog signal, wherein each circuit of the plurality of circuits may include: a variable capacitive element; and a driver configured to cause the variable capacitive element to be charged or discharged to convert the received digital signal into the analog signal.

公开(公告)号：US20240120929A1

公开(公告)日：2024-04-11

申请号：US17956835

申请日：2022-09-30

Applicant: Intel Corporation

Inventor： Ofir DEGANI ,  Run LEVINGER ,  Ashoke RAVI

IPC: H03L7/099

CPC classification number: H03L7/0998

Abstract: The present disclosure relates to a signal generator including: a plurality of interpolators, each interpolator being configured to: receive a first input signal having a first phase, and a second input signal having a second phase; generate a plurality of interpolated signals based on a plurality of interpolations of the input signals, each interpolated signal having a respective phase based on the respective interpolation, and combine the interpolated signals to provide an output signal; the plurality of interpolators including: a first plurality of interpolators, each interpolator being configured to receive as input signals a first reference signal and a second reference signal; and a second plurality of interpolators, each interpolator being configured to receive as first input signal an output signal from an interpolator of the first plurality of interpolators and as second input signal another output signal from another interpolator of the first plurality of interpolators.

公开(公告)号：US20230361802A1

公开(公告)日：2023-11-09

申请号：US18029932

申请日：2020-11-03

Applicant: Intel Corporation

Inventor： Jayprakash THAKUR ,  Ofir DEGANI ,  Ronen KRONFELD ,  Ehud RESHEF ,  Seong-Youp J. SUH ,  Tal SHOSHANA ,  Eytan MANN ,  Maruti TAMRAKAR ,  Ashoke RAVI ,  Jose Rodrigo CAMACHO PEREZ ,  Timo Sakari HUUSARI ,  Eli BOROKHOVICH ,  Amir RUBIN ,  Ofer BENJAMIN ,  Tae Young YANG ,  Harry SKINNER ,  Kwan ho LEE ,  Jaejin LEE ,  Dong-Ho Han ,  Shahar GROSS ,  Eran SEGEV ,  Telesphor KAMGAING

IPC: H04B1/40

CPC classification number: H04B1/40

Abstract: In various aspects, a radio frequency circuit is provided. The radio frequency circuit may include a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.