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公开(公告)号：US08872151B2
公开(公告)日：2014-10-28
申请号：US13896955
申请日：2013-05-17
Applicant: Intermolecular Inc.
Inventor： Michael Miller , Tony P. Chiang , Xiying Costa , Tanmay Kumar , Prashant B Phatak , April Schricker
CPC classification number: H01L45/16 , H01L21/265 , H01L21/31155 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165
Abstract: This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.
Abstract translation: 本公开提供了制造半导体器件层和相关联的存储单元结构的方法。 通过进行半导体器件层的表面处理（例如离子轰击）以产生具有有意深度分布的缺陷，可以创建具有更一致的电参数的多层存储单元。 例如，在电阻式开关存储单元中，可以获得设定和复位电压的更紧密的分配和较低的成形电压，从而提高器件的产量和可靠性。 在至少一个实施例中，选择深度轮廓以调制缺陷的类型及其对被轰击的金属氧化物层的电性能的影响并增强均匀的缺陷分布。
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公开(公告)号：US08847190B2
公开(公告)日：2014-09-30
申请号：US14091594
申请日：2013-11-27
Applicant: Intermolecular Inc.
Inventor： Nobumichi Fuchigami , Pragati Kumar , Prashant B Phatak
CPC classification number: H01L45/146 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/1616
Abstract: ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.
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公开(公告)号：US08765567B2
公开(公告)日：2014-07-01
申请号：US14062473
申请日：2013-10-24
Applicant: Intermolecular Inc.
Inventor： Sandra G Malhotra , Sean Barstow , Tony P. Chiang , Pragati Kumar , Prashant B Phatak , Sunil Shanker , Wen Wu
IPC: H01L21/02
CPC classification number: H01L45/1608 , H01L27/2418 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1625 , H01L45/1641
Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.
Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。
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公开(公告)号：US09362497B2
公开(公告)日：2016-06-07
申请号：US14595421
申请日：2015-01-13
Applicant: Intermolecular Inc.
Inventor： Pragati Kumar , Tony P. Chiang , Prashant B Phatak , Yun Wang
CPC classification number: H01L45/146 , G11C13/0002 , G11C2013/0083 , G11C2213/51 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/1625 , H01L45/1641
Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.
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公开(公告)号：US09276211B2
公开(公告)日：2016-03-01
申请号：US14721640
申请日：2015-05-26
Applicant: Intermolecular Inc.
Inventor： Prashant B Phatak , Tony P. Chiang , Pragati Kumar , Michael Miller
IPC: H01L45/00 , H01L47/00 , H01L29/861 , G11C13/00 , H01L27/24
CPC classification number: H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/55 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165 , H01L45/1658 , H01L47/00
Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
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Patent Agency Ranking
公开(公告)号：US09252360B2
公开(公告)日：2016-02-02
申请号：US14467902
申请日：2014-08-25
Applicant: Intermolecular Inc.
Inventor： Nobumichi Fuchigami , Pragati Kumar , Prashant B Phatak
CPC classification number: H01L45/146 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/1616
Abstract: ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.
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公开(公告)号：US09040465B2
公开(公告)日：2015-05-26
申请号：US13680701
申请日：2012-11-19
Applicant: Intermolecular Inc.
Inventor： Prashant B Phatak , Venkat Ananthan , Wayne R French
CPC classification number: H01L22/20 , B01J19/0046 , B01J2219/00274 , B01J2219/0043 , B01J2219/00443 , B01J2219/00527 , B01J2219/00585 , B01J2219/00596 , B01J2219/00659 , B01J2219/00702 , B01J2219/00754 , B01J2219/00756 , C23C14/042 , C40B40/18 , C40B50/14 , C40B60/08
Abstract: A combination of deposition processes can be used to evaluate layer properties using a combinatorial workflow. The processes can include a base ALD process and another process, such as a PVD process. The high productivity combinatorial technique can provide an evaluation of the material properties for given ALD base layer and PVD additional elements. An ALD process can then be developed to provide the desired layers, replacing the ALD and PVD combination.
Abstract translation: 沉积过程的组合可用于使用组合工作流来评估层的性质。 这些过程可以包括碱性ALD工艺和另一种工艺，如PVD工艺。 高生产率组合技术可以为给定的ALD基层和PVD附加元素提供材料性质的评估。 然后可以开发ALD工艺以提供所需的层，代替ALD和PVD组合。
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公开(公告)号：US08921156B2
公开(公告)日：2014-12-30
申请号：US14046029
申请日：2013-10-04
Applicant: Intermolecular Inc.
Inventor： Prashant B Phatak , Tony P. Chiang , Pragati Kumar , Michael Miller
IPC: H01L21/00 , H01L45/00 , H01L29/861 , G11C13/00 , H01L27/24
CPC classification number: H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/55 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165 , H01L45/1658 , H01L47/00
Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
Abstract translation: 描述了非易失性电阻式切换存储器，包括在第一电极和第二电极之间具有第一电极，第二电极，金属氧化物的存储元件。 使用大容量介导的开关的金属氧化物开关具有大于4电子伏特（eV）的带隙，具有用于金属氧化物的厚度每100埃至少一伏特的设定操作的设定电压，并且具有 漏电流密度小于每平方厘米40安培（A / cm2），每0.5伏（V），金属氧化物厚度每20埃测得。
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公开(公告)号：US20140051210A1
公开(公告)日：2014-02-20
申请号：US14062473
申请日：2013-10-24
Applicant: Intermolecular Inc.
Inventor： Sandra G Malhotra , Sean Barstow , Tony P. Chiang , Pragati KUMAR , Prashant B Phatak , Sunil Shanker , Wen Wu
IPC: H01L45/00
CPC classification number: H01L45/1608 , H01L27/2418 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1625 , H01L45/1641
Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.
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公开(公告)号：US20140038352A1
公开(公告)日：2014-02-06
申请号：US14046029
申请日：2013-10-04
Applicant: Intermolecular Inc.
Inventor： Prashant B Phatak , Tony P. Chiang , Pragati KUMAR , Michael Miller
IPC: H01L45/00
CPC classification number: H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/55 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165 , H01L45/1658 , H01L47/00
Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
Abstract translation: 描述了非易失性电阻式切换存储器，包括在第一电极和第二电极之间具有第一电极，第二电极，金属氧化物的存储元件。 使用大容量介导的开关的金属氧化物开关具有大于4电子伏特（eV）的带隙，具有用于金属氧化物的厚度每100埃至少一伏特的设定操作的设定电压，并且具有 漏电流密度小于每平方厘米40安培（A / cm2），每0.5伏（V），金属氧化物厚度每20埃测得。
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