Nonvolatile memory device having an electrode interface coupling region
    12.
    发明授权
    Nonvolatile memory device having an electrode interface coupling region 有权
    具有电极接口耦合区域的非易失性存储器件

    公开(公告)号:US08652923B2

    公开(公告)日:2014-02-18

    申请号:US13829194

    申请日:2013-03-14

    IPC分类号: H01L21/20

    摘要: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

    摘要翻译: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中,界面层结构包括钝化区域,界面耦合区域和/或可变电阻层接口区域,其被配置为调整非易失性存储器件的性能,例如降低形成 器件的开关电流并降低器件的成型电压,并降低从一个成形器件到另一个器件的性能变化。

    Nonvolatile Memory Device Having An Electrode Interface Coupling Region
    14.
    发明申请
    Nonvolatile Memory Device Having An Electrode Interface Coupling Region 有权
    具有电极接口耦合区域的非易失性存储器件

    公开(公告)号:US20130217179A1

    公开(公告)日:2013-08-22

    申请号:US13829194

    申请日:2013-03-14

    IPC分类号: H01L45/00

    摘要: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

    摘要翻译: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中,界面层结构包括钝化区域,界面耦合区域和/或可变电阻层接口区域,其被配置为调整非易失性存储器件的性能,例如降低形成 器件的开关电流并降低器件的成型电压,并降低从一个成形器件到另一个器件的性能变化。

    Nonvolatile memory device having an electrode interface coupling region
    16.
    发明授权
    Nonvolatile memory device having an electrode interface coupling region 有权
    具有电极接口耦合区域的非易失性存储器件

    公开(公告)号:US09184383B2

    公开(公告)日:2015-11-10

    申请号:US14156762

    申请日:2014-01-16

    IPC分类号: H01L45/00 H01L27/24

    摘要: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

    摘要翻译: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中,界面层结构包括钝化区域,界面耦合区域和/或可变电阻层接口区域,其被配置为调整非易失性存储器件的性能,例如降低形成 器件的开关电流并降低器件的成型电压,并降低从一个成形器件到另一个器件的性能变化。

    Nonvolatile Memory Device Having a Current Limiting Element
    18.
    发明申请
    Nonvolatile Memory Device Having a Current Limiting Element 审中-公开
    具有限流元件的非易失性存储器件

    公开(公告)号:US20150162530A1

    公开(公告)日:2015-06-11

    申请号:US14625867

    申请日:2015-02-19

    IPC分类号: H01L45/00 H01L27/24

    摘要: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

    摘要翻译: 本发明的实施例通常包括一种形成非易失性存储器件的方法,该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中,限流部件包括至少一层电阻材料,其被配置为提高所形成的电阻式开关存储元件的开关性能和寿命。 所形成的限流层或电阻层的电性能被配置为在逻辑状态编程步骤(即“设定”和“复位”步骤)期间通过添加固定的串联电阻来降低通过可变电阻层的电流 在形成在非易失性存储器件中的电阻式开关存储元件中。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。

    Memory cell having an integrated two-terminal current limiting resistor
    19.
    发明授权
    Memory cell having an integrated two-terminal current limiting resistor 有权
    具有集成的两端限流电阻的存储单元

    公开(公告)号:US08975727B2

    公开(公告)日:2015-03-10

    申请号:US13721310

    申请日:2012-12-20

    摘要: A resistor structure incorporated into a resistive switching memory cell with improved performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory cell. A method is also provided for making such a memory cell. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory cell, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory cell. The incorporation of the resistor structure is very useful in obtaining desirable levels of switching currents that meet the switching specification of various types of memory cells. The memory cells may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

    摘要翻译: 提供了一种结合到具有改进的性能和寿命的电阻式开关存储单元中的电阻器结构。 电阻器结构可以是设计成减小流过存储器单元的最大电流的两端结构。 还提供了一种用于制造这种存储单元的方法。 该方法包括沉积电阻器结构并沉积存储单元的电阻式开关存储单元的可变电阻层,其中电阻器结构与可变电阻层串联布置以限制存储单元的开关电流。 电阻器结构的结合对于获得满足各种类型的存储器单元的开关规范的期望的开关电流水平是非常有用的。 存储单元可以形成为可用于各种电子设备的大容量非易失性存储器集成电路的一部分。

    Atomic Layer Deposition of Metal Oxides for Memory Applications
    20.
    发明申请
    Atomic Layer Deposition of Metal Oxides for Memory Applications 有权
    用于存储器应用的金属氧化物的原子层沉积

    公开(公告)号:US20140363920A1

    公开(公告)日:2014-12-11

    申请号:US14466695

    申请日:2014-08-22

    IPC分类号: H01L45/00

    摘要: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

    摘要翻译: 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件(例如ReRAM单元)的方法提供优化的原子层沉积(ALD)工艺,用于形成金属氧化物膜堆叠,其包含至少一个硬金属氧化物膜(例如,金属被完全氧化或基本上被氧化 )和至少一种软金属氧化物膜(例如,金属比硬金属氧化物氧化较少)。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属,所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中,通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜,而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。