公开(公告)号：US06861895B1

公开(公告)日：2005-03-01

申请号：US10464129

申请日：2003-06-17

申请人： Ping-Chen Liu ,  Asim A. Bajwa

发明人： Ping-Chen Liu ,  Asim A. Bajwa

IPC分类号： H01L27/08 ,  H02M3/07 ,  G05F3/02

CPC分类号： H01L27/0802 ,  H02M3/073

摘要： A resistive divider for a voltage multiplier circuit minimizes output voltage overshoot by capacitively coupling the tap point of the resistive divider to the output terminal of the voltage multiplier circuit via the parasitic capacitance of the resistive divider. For a resistive divider that includes a resistive structure formed over a dielectric layer formed on a doped well, this capacitive coupling can be performed by connecting the well to the output terminal of the voltage multiplier circuit. This capacitive coupling improves the response time of the resistive divider, so that a scaled test voltage read from the tap point varies more rapidly than the elevated output voltage of the voltage multiplier circuit. Therefore, the scaled test voltage provides charging control that increases the elevated output voltage in gradual increments that prevent the elevated output voltage from exceeding a target output voltage.

摘要翻译： 用于电压倍增器电路的电阻分压器通过电阻分压器的抽头点通过电阻分压器的寄生电容电容耦合到电压倍增器电路的输出端来最小化输出电压过冲。 对于包括在形成于掺杂阱上的电介质层上形成的电阻结构的电阻分压器，可以通过将阱连接到电压倍增器电路的输出端来执行该电容耦合。 这种电容耦合提高了电阻分压器的响应时间，从而从分接点读取的经缩放的测试电压比电压倍增器电路的升高的输出电压更快地变化。 因此，缩放的测试电压提供充电控制，其以逐渐增加的方式增加升高的输出电压，从而防止升高的输出电压超过目标输出电压。

公开(公告)号：US09035641B1

公开(公告)日：2015-05-19

申请号：US13154149

申请日：2011-06-06

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F3/20 ,  H01F38/32 ,  G05F3/16 ,  G05F3/08 ,  G05F3/04

CPC分类号： H01F38/32 ,  G05F1/468 ,  G05F3/04 ,  G05F3/08 ,  G05F3/16

摘要： A startup circuit to ensure a bandgap reference circuit reliably starts up or recovers from a noise disturbance is provided. The startup circuit incorporates a pull down resistor to detect the bandgap reference circuit being in a disabled state. The startup circuit creates a positive feedback loop to force the bandgap reference circuit out of a disabled state. Consequently, whenever the power supply for the bandgap reference circuit sags or if bandgap output collapses, the output of the bandgap circuit reliably ramps back up to the expected level.

摘要翻译： 提供了确保带隙参考电路可靠地从噪声干扰启动或恢复的启动电路。 启动电路包含一个下拉电阻，用于检测带隙参考电路处于禁用状态。 启动电路创建一个正反馈回路，以迫使带隙参考电路处于禁用状态。 因此，每当带隙参考电路的电源下降或带隙输出崩溃时，带隙电路的输出可靠地回升到预期的水平。

公开(公告)号：US08013666B1

公开(公告)日：2011-09-06

申请号：US12534066

申请日：2009-07-31

申请人： Ping-Chen Liu

发明人： Ping-Chen Liu

IPC分类号： G05F1/10

CPC分类号： H02M3/07 ,  H02M2003/077

摘要： A charge pump circuit may have multiple charge pumps. Each charge pump may have an output. The outputs of the charge pumps may be connected to a common output terminal for the charge pump circuit. The charge pump circuit may produce an output voltage at the output terminal. The output voltage may be monitored by a charge pump regulator circuit. The charge pump regulator circuit may produce a control signal based on the measured output voltage. The control signal may be processed by register and logic gating circuitry and may be used to generate a sequential set of slave charge pump enable signals. The slave charge pump enable signals may be used to sequentially enable the charge pumps to progressively increase the strength of the charge pump while exhibiting reduced ripple.

摘要翻译： 电荷泵电路可以具有多个电荷泵。 每个电荷泵可以具有输出。 电荷泵的输出可以连接到用于电荷泵电路的公共输出端子。 电荷泵电路可在输出端产生输出电压。 输出电压可以由电荷泵调节器电路监测。 电荷泵调节器电路可以基于测量的输出电压产生控制信号。 控制信号可以由寄存器和逻辑选通电路处理，并且可以用于产生顺序的从电荷泵使能信号。 从电荷泵使能信号可用于依次使电荷泵逐渐增加电荷泵的强度，同时具有减小的纹波。

公开(公告)号：US07868605B1

公开(公告)日：2011-01-11

申请号：US11824914

申请日：2007-07-02

申请人： Ping-Chen Liu ,  Thien Le ,  Leo Min Maung

发明人： Ping-Chen Liu ,  Thien Le ,  Leo Min Maung

IPC分类号： G05F1/59 ,  G05F1/575

CPC分类号： G11C5/147 ,  G11C11/417

摘要： Power regulator circuitry is provided for powering loads such as programmable memory element arrays on integrated circuits. The power regulator circuitry may have control circuitry that generates a first digital control signal to turn on and off a regulated power supply circuit and a second digital control signal to turn on and off a switch-based power supply circuit. The outputs of the regulated power supply circuit and switch-based power supply circuit may be connected to an output terminal for the power regulator circuitry. The first and second digital control signals may be used to ensure that the regulated power supply circuit is turned on before the switch-based power supply circuit is turned off. The switch-based power supply circuitry may contain serially connected transistors. The transistors may be turned off in an order that prevents latchup.

摘要翻译： 提供功率调节器电路，为集成电路上的可编程存储元件阵列等负载供电。 功率调节器电路可以具有控制电路，其产生第一数字控制信号以打开和关闭稳压电源电路和第二数字控制信号，以接通和关断基于开关的电源电路。 调节电源电路和基于开关的电源电路的输出可以连接到用于功率调节器电路的输出端子。 第一和第二数字控制信号可以用于确保在基于开关的电源电路关闭之前调节的电源电路被接通。 基于开关的电源电路可以包含串联连接的晶体管。 可以以防止闭锁的顺序关闭晶体管。

公开(公告)号：US07088627B1

公开(公告)日：2006-08-08

申请号：US10629365

申请日：2003-07-29

申请人： Asim A. Bajwa ,  Ping-Chen Liu

发明人： Asim A. Bajwa ,  Ping-Chen Liu

IPC分类号： G11C7/00

CPC分类号： G11C16/10 ,  G11C29/82 ,  G11C29/824 ,  G11C2216/14 ,  G11C2216/30

摘要： A JTAG-programmable IC includes a memory array having redundant columns, a partial-width data register, and a full-width bitline register. A programming bitstream is shifted into the data register in discrete portions, with each portion being loaded into the bitline latch before the next portion is shifted into the data register. The programming bitstream portions fill the bitline latch sequentially unless a count indicator for a particular portion matches a predetermined defective column value, in which case that bitstream portion is rerouted to a region of the bitline latch associated with the redundant columns of the memory array. The count indicator is incremented with each new bitstream portion shifted into the data register. Once the programming bitstream is fully loaded into the bitline latch, the data is programmed into a selected row of the memory array in page mode.

摘要翻译： JTAG可编程IC包括具有冗余列的存储器阵列，部分宽度数据寄存器和全宽位线寄存器。 编程比特流以离散部分移入数据寄存器，每个部分在下一部分移入数据寄存器之前被加载到位线锁存器中。 编程比特流部分顺序填充位线锁存器，除非特定部分的计数指示符与预定的缺陷列值匹配，在这种情况下，比特流部分被重新路由到与存储器阵列的冗余列相关联的位线锁存器的区域。 每个新的比特流部分移入数据寄存器中，计数指示符递增。 一旦编程比特流被完全加载到位线锁存器中，则以页面模式将数据编程到存储器阵列的选定行中。

公开(公告)号：US06816420B1

公开(公告)日：2004-11-09

申请号：US10629109

申请日：2003-07-29

申请人： Ping-Chen Liu ,  Asim A. Bajwa

发明人： Ping-Chen Liu ,  Asim A. Bajwa

IPC分类号： G11C700

CPC分类号： G11C29/848 ,  G11C29/846 ,  G11C29/86 ,  G11C2216/30

摘要： A serially programmable integrated circuit (IC) includes a memory array and multiple data registers daisy-chained by bypass logic. Each of the data registers is associated with a primary column grouping or redundant column grouping in the memory array. If a data register is associated with a primary column grouping that includes a defective column, the bypass logic bypasses that data register and incorporates one of the data registers associated with a redundant column grouping into the serial programming path of the IC. Therefore, when a programming bitstream is shifted into this serial programming path, defective columns in the memory array are automatically bypassed during the subsequent programming operation. To read a word from the memory array, any data stored in the redundant columns is first read out, and then the data from the primary columns is read out, bypassing the previously identified defective column groupings.

公开(公告)号：US09939827B1

公开(公告)日：2018-04-10

申请号：US13328917

申请日：2011-12-16

申请人： Justin Jon Philpott ,  Ping-Chen Liu ,  Ravi Thiruveedhula

发明人： Justin Jon Philpott ,  Ping-Chen Liu ,  Ravi Thiruveedhula

IPC分类号： G05F1/56 ,  G05F3/22 ,  G05F1/00 ,  G05F1/46 ,  H02M1/32 ,  H03M3/00 ,  G01K7/42 ,  G01K3/00 ,  H01L27/02 ,  H02H7/12

CPC分类号： G05F1/56 ,  G01K3/005 ,  G01K7/425 ,  G01K13/00 ,  G05F1/00 ,  G05F1/463 ,  G05F3/225 ,  H01L27/0248 ,  H02H7/1213 ,  H02M1/32 ,  H03M3/322

摘要： An integrated circuit having power supply circuitry configured to generate a temperature dependent power supply voltage is provided. The power supply circuitry may include temperature sensors formed at different regions on the integrated circuit. The power supply circuitry may use a selected one of the temperature sensors to vary the temperature dependent power supply voltage. The power supply circuitry may include voltage clamping circuitry configured to clip the power supply voltage to an upper fixed voltage level when the power supply voltage exceeds a first predetermined threshold and to clip the power supply voltage to a lower fixed voltage level when the power supply voltage falls below a second predetermined threshold. The power supply circuitry may also include voltage overshoot-undershoot protection circuitry configured to keep the temperature dependent power supply voltage within a specified voltage range in the presence of transient perturbations in the temperature dependent power supply voltage.

公开(公告)号：US09069369B1

公开(公告)日：2015-06-30

申请号：US13436660

申请日：2012-03-30

申请人： Ping-Chen Liu ,  Justin Jon Philpott ,  Arvind Sherigar

发明人： Ping-Chen Liu ,  Justin Jon Philpott ,  Arvind Sherigar

IPC分类号： G05F1/00 ,  G05F1/56 ,  G05F1/567

CPC分类号： G05F1/56 ,  G05F1/567

摘要： A voltage regulator is disclosed. The voltage regulator includes an operational amplifier (op-amp) and a voltage trim circuit. The op-amp is operable to receive a reference voltage at a first terminal. The op-amp also includes an output terminal. The voltage trim circuit is coupled between the output terminal and a second terminal of the op-amp. The voltage trim circuit is operable to modify an output voltage to be substantially equivalent with the reference voltage. The modification is performed by selecting an electrical current propagating pathway. An IC and a method to operate the voltage regulator is also disclosed.

摘要翻译： 公开了一种电压调节器。 电压调节器包括运算放大器（运算放大器）和电压调整电路。 运算放大器可操作以在第一端子处接收参考电压。 运算放大器还包括一个输出端子。 电压调整电路耦合在输出端子和运算放大器的第二端子之间。 电压调整电路可操作以将输出电压修改为与参考电压基本相等。 通过选择电流传播路径进行修改。 还公开了一种用于操作电压调节器的IC和方法。

公开(公告)号：US08324876B1

公开(公告)日：2012-12-04

申请号：US12263251

申请日：2008-10-31

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/00

CPC分类号： G05F1/575

摘要： A low dropout (LDO) voltage regulator with unconditional frequency compensation is presented. The low dropout voltage regulator is implemented using a two-stage operational amplifier. The first stage amplifier has two input transistors, each of which is connected to a diode-connected transistor. A transistor is connected in parallel to the diode-connected transistors to increase the gain of the first stage amplifier. The LDO voltage regulator has a compensation capacitance input between the first stage amplifier and the second stage amplifier and a voltage on the compensation capacitance input adjusts the current through the diode-connected transistors, as well as the gain of the first stage amplifier. The second stage amplifier receives output from the first stage amplifier, and a compensation capacitor is connected between the compensation capacitance input of the operational amplifier and the output node of the LDO voltage regulator.

摘要翻译： 提出了一种具有无条件频率补偿的低压差（LDO）稳压器。 低压差稳压器采用两级运算放大器实现。 第一级放大器具有两个输入晶体管，每个输入晶体管连接到二极管连接的晶体管。 晶体管与二极管连接的晶体管并联连接，以增加第一级放大器的增益。 LDO稳压器在第一级放大器和第二级放大器之间具有补偿电容输入，并且补偿电容输入端的电压调节通过二极管连接的晶体管的电流以及第一级放大器的增益。 第二级放大器接收来自第一级放大器的输出，并且补偿电容器连接在运算放大器的补偿电容输入端和LDO稳压器的输出节点之间。

公开(公告)号：US08120411B1

公开(公告)日：2012-02-21

申请号：US12534007

申请日：2009-07-31

申请人： Ping-Chen Liu ,  Thien Le

发明人： Ping-Chen Liu ,  Thien Le

IPC分类号： G05F1/46

CPC分类号： H02M3/07 ,  H02M1/36

摘要： A charge pump circuit is provided that has a controllable ramp rate. The charge pump circuit may receive a control signal from a control circuit. The control signal may be asserted by the control circuit to turn on the charge pump circuit. When the charge pump circuit is turned on, the charge pump circuit produces an output voltage. The output voltage ramps up from an initial value to a desired target value. During the ramp up process, a ramp rate regulation circuit monitors the output voltage and ensures that the ramp rate does not exceed a desired maximum value. A capacitor may be charged at a desired ramp rate to use as a time-varying reference voltage. A feedback circuit may be used to maintain the output voltage at the desired target value once the ramp-up process is complete.

摘要翻译： 提供具有可控升压速率的电荷泵电路。 电荷泵电路可以从控制电路接收控制信号。 控制信号可由控制电路断言以接通电荷泵电路。 当电荷泵电路接通时，电荷泵电路产生输出电压。 输出电压从初始值上升到期望的目标值。 在升压过程中，斜坡率调节电路监视输出电压，并确保斜坡率不超过所需的最大值。 电容器可以以期望的斜率充电以用作时变参考电压。 一旦加速过程完成，可以使用反馈电路将输出电压维持在期望的目标值。