公开(公告)号：US08907450B2

公开(公告)日：2014-12-09

申请号：US13293075

申请日：2011-11-09

申请人： Changhan Yun ,  Chengjie Zuo ,  Chi Shun Lo ,  Jonghae Kim ,  Mario F. Velez

发明人： Changhan Yun ,  Chengjie Zuo ,  Chi Shun Lo ,  Jonghae Kim ,  Mario F. Velez

IPC分类号： H01L29/92 ,  H01L21/02 ,  H01G4/12 ,  H01G4/33 ,  H01L49/02

CPC分类号： H01L29/66174 ,  H01G4/1272 ,  H01G4/33 ,  H01L28/40 ,  H01L28/75

摘要： Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.

摘要翻译： 提供了用于高Q装置的金属半导体晶片接合的方法和装置。 示例性电容器包括形成在玻璃基板，第二板和介电层上的第一板。 在第一板和玻璃基板之间不使用有机粘合剂，并且电介质层可以是本征半导体。 重掺杂的非本征半导体层接触电介质层。 电介质和非本征半导体层夹在第一和第二板之间。 在第一板和电介质层之间形成金属间层。 金属间化合物层被热压接合到第一板和电介质层。 电容器可以作为高Q电容器和/或变容二极管耦合在电路中，并且可以与移动设备集成。

公开(公告)号：US08803648B2

公开(公告)日：2014-08-12

申请号：US13463257

申请日：2012-05-03

申请人： Chi Shun Lo ,  Jonghae Kim ,  Chengjie Zuo ,  Changhan Hobie Yun

发明人： Chi Shun Lo ,  Jonghae Kim ,  Chengjie Zuo ,  Changhan Hobie Yun

IPC分类号： H01F5/00 ,  H01F27/28 ,  H01F27/29

CPC分类号： H05K3/465 ,  H01F27/2804 ,  H01F2017/002 ,  H01F2017/004

摘要： This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another.

摘要翻译： 本公开提供了电感器，变压器和相关过程的实现。 一方面，一种装置包括具有第一表面和第二表面的基底。 第一感应装置包括第一组通孔，第二组通孔，布置在连接第一和第二通孔的第一表面上的第一组迹线，以及布置在第二表面上的第二组迹线，该第二组迹线连接第一和第二通孔 通孔 第二感应装置与第一感应装置电感耦合和交错，并且包括第三组通孔，第四组通孔，布置在连接第三和第四通孔的第一表面上的第三组迹线和第四组 布置在连接第三和第四通孔的第二表面上的迹线。 一组或多组电介质层将迹线的一部分彼此绝缘。

公开(公告)号：US20140035702A1

公开(公告)日：2014-02-06

申请号：US13563252

申请日：2012-07-31

申请人： Justin Phelps Black ,  Philip Jason Stephanou ,  Jonghae Kim ,  Je-Hsiung Jeffrey Lan ,  Sang-June Park ,  Changhan Hobie Yun ,  Chi Shun Lo ,  Chengjie Zuo

发明人： Justin Phelps Black ,  Philip Jason Stephanou ,  Jonghae Kim ,  Je-Hsiung Jeffrey Lan ,  Sang-June Park ,  Changhan Hobie Yun ,  Chi Shun Lo ,  Chengjie Zuo

IPC分类号： H03H9/00 ,  H03H7/01

CPC分类号： H03H7/075 ,  H03H9/465 ,  H03H2007/006

摘要： This disclosure provides implementations of filters and filter topologies, circuits, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes one or more LC resonant circuit stages. In some implementations, each LC stage includes an inductor and a capacitor. Each LC stage also has a corresponding resonant frequency. The one or more LC stages are arranged to produce an unmodified passband over a range of frequencies having a corresponding bandwidth. One or more microelectromechanical systems (MEMS) resonators are arranged with the one or more LC stages. The one or more MEMS resonators are arranged with the one or more LC stages so as to modify characteristics of the unmodified passband such that the hybrid filter produces a modified passband having a modified bandwidth and one or more other modified band characteristics.

摘要翻译： 本公开提供了滤波器和滤波器拓扑，电路，结构，设备，装置，系统和相关过程的实现。 在一个方面，器件包括一个或多个LC谐振电路级。 在一些实现中，每个LC级包括电感器和电容器。 每个LC级还具有相应的谐振频率。 一个或多个LC级布置成在具有相应带宽的频率范围上产生未修改的通带。 一个或多个微机电系统（MEMS）谐振器与一个或多个LC级布置。 一个或多个MEMS谐振器被布置成具有一个或多个LC级，以便修改未修改的通带的特性，使得混合滤波器产生具有修改的带宽和一个或多个其它修改的频带特性的修改的通带。

公开(公告)号：US20130295866A1

公开(公告)日：2013-11-07

申请号：US13464092

申请日：2012-05-04

申请人： Chengjie Zuo ,  Changhan Yun ,  Chi Shun Lo ,  Mario F. Velez ,  Jonghae Kim

发明人： Chengjie Zuo ,  Changhan Yun ,  Chi Shun Lo ,  Mario F. Velez ,  Jonghae Kim

IPC分类号： H04B1/16

CPC分类号： H04B7/0805 ,  H04B1/005 ,  H04B1/16 ,  H04B1/18 ,  H04B7/0825

摘要： A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.

公开(公告)号：US20140028543A1

公开(公告)日：2014-01-30

申请号：US13562168

申请日：2012-07-30

申请人： Chi Shun Lo ,  Je-Hsiung Jeffrey Lan ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Jonghae Kim

发明人： Chi Shun Lo ,  Je-Hsiung Jeffrey Lan ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Jonghae Kim

IPC分类号： H01F5/00 ,  B05D5/12 ,  C25D5/02 ,  G06T1/00 ,  G06F3/01 ,  G06F1/16 ,  B05D3/10

CPC分类号： H01F17/0006 ,  G02B26/001 ,  H01F27/2804 ,  H01L23/5227 ,  H01L28/10 ,  H01L2924/00 ,  H01L2924/0002

摘要： This disclosure provides systems, methods and apparatus for vias in an integrated circuit structure such as a passive device. In one aspect, an integrated passive device includes a first conductive trace and a second conductive trace over the first conductive trace with an interlayer dielectric between a portion of the first conductive trace and the second conductive trace. One or more vias are provided within the interlayer dielectric to provide electrical connection between the first conductive trace and the second conductive trace. A width of the vias is greater than a width of at least one of the conductive traces.

摘要翻译： 本公开提供了诸如无源器件的集成电路结构中的通孔的系统，方法和装置。 一方面，集成无源器件包括在第一导电迹线上的第一导电迹线和第二导电迹线，在第一导电迹线的一部分和第二导电迹线之间具有层间电介质。 在层间电介质中提供一个或多个通孔以提供第一导电迹线和第二导电迹线之间的电连接。 通孔的宽度大于至少一个导电迹线的宽度。

公开(公告)号：US20130134838A1

公开(公告)日：2013-05-30

申请号：US13305293

申请日：2011-11-28

申请人： Changhan Hobie Yun ,  Chi Shun Lo ,  Chengjie Zuo ,  Jonghae Kim

发明人： Changhan Hobie Yun ,  Chi Shun Lo ,  Chengjie Zuo ,  Jonghae Kim

IPC分类号： H01L41/107 ,  H01L41/22

CPC分类号： H01L41/107 ,  H01L41/047 ,  H03H9/02228 ,  Y10T29/42

摘要： This disclosure provides implementations of electromechanical systems piezoelectric resonator transformers, devices, apparatus, systems, and related processes. In one aspect, a transformer includes a piezoelectric layer; a first conductive layer arranged over a first surface of the piezoelectric layer including a first set of electrodes and a second set of electrodes interdigitated with the first set. The transformer includes a second conductive layer arranged over a second surface including at least a third set of electrodes. In some implementations, the transformer includes a first port capable of receiving an input signal and to which the first set of electrodes are coupled, and a second port capable of being coupled to a load and of outputting an output signal, the second set of electrodes being coupled to the second port. Generally, a ratio of the number of electrodes of the second set to the first set characterizes a transformation ratio.

摘要翻译： 本公开提供了机电系统压电谐振器变压器，装置，装置，系统和相关过程的实现。 一方面，变压器包括压电层; 布置在压电层的第一表面上的第一导电层，包括第一组电极和与第一组交叉的第二组电极。 变压器包括布置在包括至少第三组电极的第二表面上的第二导电层。 在一些实施方式中，变压器包括能够接收输入信号并且第一组电极被耦合的第一端口和能够耦合到负载并输出输出信号的第二端口，第二组电极 耦合到第二端口。 通常，第二组的电极数与第一组的比例表示变换比。

公开(公告)号：US20130120951A1

公开(公告)日：2013-05-16

申请号：US13356717

申请日：2012-01-24

申请人： Chengjie Zuo ,  Changhan Yun ,  Sang-June Park ,  Chi Shun Lo ,  Mario F. Velez ,  Jonghae Kim

发明人： Chengjie Zuo ,  Changhan Yun ,  Sang-June Park ,  Chi Shun Lo ,  Mario F. Velez ,  Jonghae Kim

IPC分类号： H05K1/03 ,  H01L21/60 ,  H05K7/06 ,  H01L21/58

CPC分类号： H01L27/0688 ,  H01L2224/18

摘要： A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.

摘要翻译： 芯片组包括玻璃板，石英或蓝宝石片，以及在第一基底层的第一面上具有至少一个第一电路层的第一晶片。 第一晶片连接到片材，使得至少一个第一电路层位于第一基片层和片之间。 具有在第二衬底层的第一侧上的至少一个第二电路层的第二晶片连接到第一衬底层，使得至少一个第二电路层位于第二衬底层和第一衬底层之间。 还有一种形成芯片组的方法。

公开(公告)号：US20130113076A1

公开(公告)日：2013-05-09

申请号：US13293075

申请日：2011-11-09

申请人： Changhan YUN ,  Chengjie Zuo ,  Chi Shun Lo ,  Jonghae Kim ,  Mario F. Velez

发明人： Changhan YUN ,  Chengjie Zuo ,  Chi Shun Lo ,  Jonghae Kim ,  Mario F. Velez

IPC分类号： H01L21/02 ,  H01L29/92

CPC分类号： H01L29/66174 ,  H01G4/1272 ,  H01G4/33 ,  H01L28/40 ,  H01L28/75

摘要： Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.

公开(公告)号：US20130076209A1

公开(公告)日：2013-03-28

申请号：US13241356

申请日：2011-09-23

申请人： Chengjie Zuo ,  Chi Shun Lo ,  Sanghoon Joo ,  Changhan Yun ,  Jonghae Kim

发明人： Chengjie Zuo ,  Chi Shun Lo ,  Sanghoon Joo ,  Changhan Yun ,  Jonghae Kim

IPC分类号： H01L41/107 ,  H01L41/04 ,  H01L41/047

CPC分类号： H03H9/02157 ,  H03H9/02062 ,  H03H9/56

摘要： A method and apparatus for a piezoelectric resonator having combined thickness and width vibrational modes are disclosed. A piezoelectric resonator may include a piezoelectric substrate and a first electrode coupled to a first surface of the piezoelectric substrate. The piezoelectric resonator may further include a second electrode coupled to a second surface of the piezoelectric substrate, where the first surface and the second surface are substantially parallel and define a thickness dimension of the piezoelectric substrate. Furthermore, the thickness dimension and the width dimension of the piezoelectric substrate are configured to produce a resonance from a coherent combination of a thickness vibrational mode and a width vibrational mode when an excitation signal is applied to the electrodes.

摘要翻译： 公开了一种具有组合的厚度和宽度振动模式的压电谐振器的方法和装置。 压电谐振器可以包括压电衬底和耦合到压电衬底的第一表面的第一电极。 压电谐振器还可以包括耦合到压电基板的第二表面的第二电极，其中第一表面和第二表面基本平行并且限定压电基板的厚度尺寸。 此外，压电基板的厚度尺寸和宽度尺寸被构造成当激励信号施加到电极时，从厚度振动模式和宽度振动模式的相干组合产生谐振。

公开(公告)号：US20130021304A1

公开(公告)日：2013-01-24

申请号：US13186277

申请日：2011-07-19

申请人： Chengjie Zuo ,  Chi Shun Lo ,  Changhan Yun ,  Jonghae Kim

发明人： Chengjie Zuo ,  Chi Shun Lo ,  Changhan Yun ,  Jonghae Kim

IPC分类号： G06F3/038 ,  H01L41/047

CPC分类号： H03H9/173 ,  H03H9/02228

摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. A resonator structure generally includes a first conductive layer with an input electrode, an output electrode, and a ground electrode. The ground electrode is disposed between the input electrode and the output electrode. In some implementations, the second conductive layer includes an input electrode, an output electrode, and a ground electrode. In some other implementations, a second conductive layer includes a pair of ground electrodes and a signal electrode in the form of an input or output electrode disposed between the ground electrodes. A piezoelectric layer is disposed between the first conductive layer and the second conductive layer. Sub-resonators can be defined in different regions of the structure, such that the piezoelectric layer is capable of moving to produce an output signal having frequencies at a first resonant frequency and a second resonant frequency.

摘要翻译： 本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。 谐振器结构通常包括具有输入电极，输出电极和接地电极的第一导电层。 接地电极设置在输入电极和输出电极之间。 在一些实施方案中，第二导电层包括输入电极，输出电极和接地电极。 在一些其他实施方案中，第二导电层包括一对接地电极和设置在接地电极之间的输入或输出电极形式的信号电极。 压电层设置在第一导电层和第二导电层之间。 次谐振器可以在结构的不同区域中定义，使得压电层能够移动以产生具有第一谐振频率和第二谐振频率的频率的输出信号。