公开(公告)号：US08304352B2

公开(公告)日：2012-11-06

申请号：US13051031

申请日：2011-03-18

申请人： Masayuki Tanaka ,  Kazuhiro Matsuo ,  Yoshio Ozawa

发明人： Masayuki Tanaka ,  Kazuhiro Matsuo ,  Yoshio Ozawa

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/28282 ,  H01L27/11568 ,  H01L27/11582

摘要： According to an embodiment, there is provided a method of manufacturing a semiconductor device, including forming a nitride film by nitriding a surface of an underlying region having a semiconductor region containing silicon as a main component and an insulating region containing silicon and oxygen as a main component and adjacent to the semiconductor region, carrying out oxidation with respect to the nitride film to convert a portion of the nitride film which is formed on the insulating region into an oxide film and to leave a portion of the nitride film which is formed on the semiconductor region as at least part of a charge storage insulating film, forming a block insulating film on the charge storage insulating film, and forming a gate electrode film on the block insulating film.

摘要翻译： 根据一个实施例，提供一种制造半导体器件的方法，包括通过氮化作为主要成分的含有硅的半导体区域的下面的区域的表面和以硅和氧为主要的绝缘区域来形成氮化物膜 并且与半导体区域相邻，相对于氮化物膜进行氧化，将形成在绝缘区域上的氮化物膜的一部分转换为氧化膜，并且使形成在该半导体层上的氮化膜的一部分 半导体区域作为电荷存储绝缘膜的至少一部分，在电荷存储绝缘膜上形成块绝缘膜，并在块绝缘膜上形成栅极电极膜。

公开(公告)号：US08198159B2

公开(公告)日：2012-06-12

申请号：US12054089

申请日：2008-03-24

申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

IPC分类号： H01L21/324 ,  H01L29/788

CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

公开(公告)号：US20120094476A1

公开(公告)日：2012-04-19

申请号：US13051031

申请日：2011-03-18

申请人： Masayuki TANAKA ,  Kazuhiro Matsuo ,  Yoshio Ozawa

发明人： Masayuki TANAKA ,  Kazuhiro Matsuo ,  Yoshio Ozawa

IPC分类号： H01L21/28

CPC分类号： H01L21/28282 ,  H01L27/11568 ,  H01L27/11582

摘要： According to an embodiment, there is provided a method of manufacturing a semiconductor device, including forming a nitride film by nitriding a surface of an underlying region having a semiconductor region containing silicon as a main component and an insulating region containing silicon and oxygen as a main component and adjacent to the semiconductor region, carrying out oxidation with respect to the nitride film to convert a portion of the nitride film which is formed on the insulating region into an oxide film and to leave a portion of the nitride film which is formed on the semiconductor region as at least part of a charge storage insulating film, forming a block insulating film on the charge storage insulating film, and forming a gate electrode film on the block insulating film.

摘要翻译： 根据一个实施例，提供一种制造半导体器件的方法，包括通过氮化作为主要成分的含有硅的半导体区域的下面的区域的表面和以硅和氧为主要的绝缘区域来形成氮化物膜 并且与半导体区域相邻，相对于氮化物膜进行氧化，将形成在绝缘区域上的氮化物膜的一部分转换为氧化膜，并且使形成在该半导体层上的氮化膜的一部分 半导体区域作为电荷存储绝缘膜的至少一部分，在电荷存储绝缘膜上形成块绝缘膜，并在块绝缘膜上形成栅极电极膜。

公开(公告)号：US20110248329A1

公开(公告)日：2011-10-13

申请号：US13164946

申请日：2011-06-21

申请人： Toshitake Yaegashi ,  Yoshio Ozawa

发明人： Toshitake Yaegashi ,  Yoshio Ozawa

IPC分类号： H01L27/105 ,  H01L29/788

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.

摘要翻译： 半导体集成电路器件包括：第一，第二栅电极，第一，第二扩散层，电连接到第一扩散层的接触电极;第一绝缘膜，其在第一和第二栅电极之间具有凹入部分，并且不含氮作为 主要成分，形成在第一绝缘膜上并且不含氮作为主要成分的第二绝缘膜和形成在第一扩散层上的第三绝缘膜，第一栅电极，第二扩散层和第二栅电极， 第二绝缘膜设置在部分区域之间。 形成第二绝缘膜以填充凹部，并且第一和第二栅电极之间的部分具有至少包含第一绝缘膜和第二绝缘膜的多层结构。

公开(公告)号：US07999304B2

公开(公告)日：2011-08-16

申请号：US12026942

申请日：2008-02-06

申请人： Yoshio Ozawa ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

发明人： Yoshio Ozawa ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

IPC分类号： H01L29/76

CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/512 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate, and nonvolatile memory cells, each of the cells including a channel region having a channel length and a channel width, a tunnel insulating film, a floating gate electrode, a control gate electrode, an inter-electrode insulating film between the floating and control gate electrodes, and an electrode side-wall insulating film on side-wall surfaces of the floating and control gate electrodes, the electrode side-wall insulating film including first and second insulating films having first and second dielectric constants, the first dielectric constant being higher than the second dielectric constant, the second dielectric constant being higher than a dielectric constant of a silicon nitride film, the first insulating film being in a central region of a facing region between the floating and control gate electrodes, the second insulating region being in the both end regions of the facing region and protruding from the both end portions.

摘要翻译： 半导体器件包括半导体衬底和非易失性存储单元，每个单元包括具有沟道长度和沟道宽度的沟道区，隧道绝缘膜，浮栅电极，控制栅电极，电极间绝缘 在浮置控制栅电极和控制栅极电极的侧壁表面之间的电极侧壁绝缘膜，电极侧壁绝缘膜包括具有第一和第二介电常数的第一和第二绝缘膜， 所述第一介电常数高于所述第二介电常数，所述第二介电常数高于氮化硅膜的介电常数，所述第一绝缘膜位于所述浮动栅极和控制栅电极之间的面对区域的中心区域中， 第二绝缘区域位于面对区域的两端区域中并从两端口突出 ons。

公开(公告)号：US07977728B2

公开(公告)日：2011-07-12

申请号：US12715455

申请日：2010-03-02

申请人： Toshitake Yaegashi ,  Yoshio Ozawa

发明人： Toshitake Yaegashi ,  Yoshio Ozawa

IPC分类号： H01L29/788

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.

摘要翻译： 半导体集成电路器件包括：第一，第二栅电极，第一，第二扩散层，电连接到第一扩散层的接触电极;第一绝缘膜，其在第一和第二栅电极之间具有凹入部分，并且不含氮作为 主要成分，形成在第一绝缘膜上并且不含氮作为主要成分的第二绝缘膜和形成在第一扩散层上的第三绝缘膜，第一栅电极，第二扩散层和第二栅电极， 第二绝缘膜设置在部分区域之间。 形成第二绝缘膜以填充凹部，并且第一和第二栅电极之间的部分具有至少包含第一绝缘膜和第二绝缘膜的多层结构。

公开(公告)号：US20110143530A1

公开(公告)日：2011-06-16

申请号：US13033017

申请日：2011-02-23

申请人： Atsuhiro SATO ,  Fumitaka Arai ,  Yoshio Ozawa ,  Takeshi Kamigaichi

发明人： Atsuhiro SATO ,  Fumitaka Arai ,  Yoshio Ozawa ,  Takeshi Kamigaichi

IPC分类号： H01L21/3205

CPC分类号： H01L21/823462 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/7881

摘要： A semiconductor memory device according to the present invention includes: a first transistor formed on a semiconductor substrate 11, the first transistor including a first gate-insulating film 14a that is oxynitrided; and a second transistor including a second gate-insulating film 14b formed on the semiconductor substrate 11 and a barrier film 20 formed at least partially on the second gate-insulating film 14b, the second gate-insulating film having a lower nitrogen atom concentration than the first gate-insulating film.

摘要翻译： 根据本发明的半导体存储器件包括：形成在半导体衬底11上的第一晶体管，所述第一晶体管包括被氮氧化的第一栅极绝缘膜14a; 以及第二晶体管，包括形成在半导体衬底11上的第二栅极绝缘膜14b和至少部分地形成在第二栅极绝缘膜14b上的阻挡膜20，第二栅极绝缘膜具有比 第一栅极绝缘膜。

公开(公告)号：US20110069530A1

公开(公告)日：2011-03-24

申请号：US12823467

申请日：2010-06-25

申请人： Katsuyuki SEKINE ,  Ryota Fujitsuka ,  Yoshio Ozawa

发明人： Katsuyuki SEKINE ,  Ryota Fujitsuka ,  Yoshio Ozawa

IPC分类号： G11C11/00 ,  H01L21/66

CPC分类号： G11C13/0069 ,  G11C11/005 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/101

摘要： According to one embodiment, there is provided a method of manufacturing a nonvolatile memory device. In this method, a first voltage may be applied to a variable resistive element having a resistance value which is electrically rewritable in a high resistance and in a low resistance. In this method, a second voltage may be applied to the variable resistive element in a case where the resistance value of the variable resistive element to which the first voltage has been applied is greater than a resistance value of the low resistance and is not greater than a resistance value of the high resistance. Further, in this method, the applying of the second voltage to the variable resistive element may be repeated until the resistance value of the variable resistive element to which the second voltage has been applied falls within a range of the resistance value of the low resistance.

摘要翻译： 根据一个实施例，提供了一种制造非易失性存储器件的方法。 在该方法中，可以将第一电压施加到具有电阻可变的电阻值的高电阻和低电阻的可变电阻元件。 在该方法中，在施加了第一电压的可变电阻元件的电阻值大于低电阻的电阻值的情况下，可以向可变电阻元件施加第二电压，并且不大于 电阻值为高电阻。 此外，在该方法中，可以重复向可变电阻元件施加第二电压，直到施加了第二电压的可变电阻元件的电阻值落在低电阻的电阻值的范围内。

公开(公告)号：US07888730B2

公开(公告)日：2011-02-15

申请号：US11687758

申请日：2007-03-19

申请人： Masayuki Ichige ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

发明人： Masayuki Ichige ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

IPC分类号： H01L29/788

摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.

公开(公告)号：US07863166B2

公开(公告)日：2011-01-04

申请号：US12646563

申请日：2009-12-23

申请人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

发明人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

IPC分类号： H01L21/20

CPC分类号： H01L27/115 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1203 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.

摘要翻译： 一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在 开口部。 然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。 接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。 然后，在硅单晶层上形成存储单元阵列。