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27 条记录 (耗时 0.026 秒)

    Micro-structure and manufacturing method and apparatus
    11.
    发明授权
    Micro-structure and manufacturing method and apparatus 失效
    微结构及制造方法及装置

    公开(公告)号：US06245249B1

    公开(公告)日：2001-06-12

    申请号：US09064056

    申请日：1998-04-22

    申请人： Takayuki Yamada ,  Mutsuya Takahashi ,  Masaki Nagata

    发明人： Takayuki Yamada ,  Mutsuya Takahashi ,  Masaki Nagata

    IPC分类号： B32B3100

    CPC分类号： B81C99/008 ,  B29C64/00 ,  B33Y10/00 ,  B33Y30/00 ,  B81B2201/035 ,  B81C2201/0197 ,  Y10T156/12 ,  Y10T156/13 ,  Y10T156/14 ,  Y10T428/24355

    摘要： A substrate on which a plurality of thin films having a plurality of cross-sections corresponding to the cross-section of a micro-structure are formed is placed on a substrate holder. The substrate holder is elevated to bond a thin film formed on the substrate to the surface of a stage, and by lowering the substrate holder, the thin film is separated from the substrate and transferred to the stage side. The transfer process is repeated to laminate a plurality of thin films on the stage and to form the micro-structure. Accordingly, there are provided a micro-structure having high dimensional precision, especially high resolution in the lamination direction, which can be manufactured from a metal or an insulator such as ceramics and can be manufactured in the combined form of structural elements together, and a manufacturing method and an apparatus thereof.

    摘要翻译： 其上形成有多个与微结构的横截面相对应的多个横截面的薄膜的基板被放置在基板支架上。 衬底保持器被升高以将形成在衬底上的薄膜粘合到台的表面上，并且通过降低衬底保持器，将薄膜与衬底分离并转移到平台侧。 重复转印过程以在台上层压多个薄膜并形成微结构。 因此，提供了可以由诸如陶瓷的金属或绝缘体制造的具有高尺寸精度，特别是层压方向上的高分辨率的微结构，并且可以以结构元件的组合形式一起制造，并且 制造方法及其装置。

    Structure suitable for solid electrochemical elements
    12.
    发明授权
    Structure suitable for solid electrochemical elements 失效
    结构适用于固体电化学元素

    公开(公告)号：US4810599A

    公开(公告)日：1989-03-07

    申请号：US172166

    申请日：1988-03-23

    申请人： Shigeo Kondo ,  Naoshi Yasuda ,  Masaki Nagata ,  Tadashi Sotomura

    发明人： Shigeo Kondo ,  Naoshi Yasuda ,  Masaki Nagata ,  Tadashi Sotomura

    IPC分类号： G02F1/15 ,  H01G9/02 ,  H01G11/56 ,  H01M4/62 ,  H01M6/18

    CPC分类号： H01G9/038 ,  G02F1/1525 ,  H01G11/56 ,  H01M4/621 ,  H01M6/18 ,  H01M6/181 ,  Y02E60/13

    摘要： A structure comprising a pair of electrode sheets and an electrolyte sheet, the latter being sandwiched in between the former, wherein each of the pair of electrode sheets comprises a mixture comprising an insulating elastomer and an electrode active substance powder and/or an inorganic solid electrolyte powder, in which mixture the electrode active substance powder and/or the inorganic solid electrolyte powder are dispersed in a volume fraction of 75-95% in the insulating elastomer, and said electrolyte sheet comprises a mixture of an inorganic solid electrolyte powder and an insulating elastomer and optionally an electrode active substance powder, in which mixture the inorganic solid electrolyte powder and optionally the electrode active substance powder are dispersed in a volume fraction of 55-95% in the insulating elastomer. Each of said electrode sheet and said electrolyte sheet may further comprise a reticulate material sheet, the openions of which are filled with the mixture. The structure is excellent in ion-conductivity, processability, productivity, storage stability and flexibility and enables one to make solid electrolyte cells, solid electric double layer capacitors and solid electrochromic display thinner and larger in area.

    摘要翻译： 一种结构，包括一对电极片和电解质片，后者被夹在前者之间，其中每对电极片包括包含绝缘弹性体和电极活性物质粉末和/或无机固体电解质的混合物 粉末，其中电极活性物质粉末和/或无机固体电解质粉末在绝缘弹性体中以75-95％的体积分数分散，并且所述电解质片材包含无机固体电解质粉末和绝缘体的混合物 弹性体和任选的电极活性物质粉末，其中无机固体电解质粉末和任选的电极活性物质粉末在绝缘弹性体中以55-95％的体积分数分散。 所述电极片和所述电解质片中的每一个可以进一步包括网状材料片，其开口填充有混合物。 该结构具有优异的离子传导性，加工性，生产率，储存稳定性和柔韧性，使得固体电解质电池，固体双电层电容器和固体电致变色显示器的面积更薄更大。

    Highly weather-resistant, thermoformable sheeting
    14.
    发明授权
    Highly weather-resistant, thermoformable sheeting 失效
    高耐候性，可热成型的片材

    公开(公告)号：US4042548A

    公开(公告)日：1977-08-16

    申请号：US622513

    申请日：1975-10-15

    申请人： Mitsuo Abe ,  Masaki Nagata ,  Masafumi Kikuchi

    发明人： Mitsuo Abe ,  Masaki Nagata ,  Masafumi Kikuchi

    IPC分类号： C08L27/00 ,  C08L1/00 ,  C08L7/00 ,  C08L9/02 ,  C08L21/00 ,  C08L23/00 ,  C08L27/06 ,  C08L33/00 ,  C08L33/02 ,  C08L51/00 ,  C08L51/02 ,  C08L51/04 ,  C08L51/06 ,  C08L101/00 ,  C08K5/12 ,  C08K5/15

    CPC分类号： C08L27/06 ,  C08L51/04 ,  C08L51/06 ,  C08L9/02

    摘要： A highly weather-resistant, thermoformable sheeting prepared by mixing from 45 to 70 parts by weight of a rigid thermoplastic resin selected from the group consisting of polyvinyl chlorides and copolymers each of which is composed mostly of a vinyl chloride and a small amount of a monoolefinic monomer copolymerizable with the vinyl chloride, from 20 to 50 parts by weight of a thermoplastic resin obtained by a graft polymerization of from 20 to 40 parts by weight of an ethylene-propylene copolymer rubber or ethylene-propylene-diene terpolymer with from 60 to 80 parts by weight of a vinyl monomer mixture consisting of from 40 to 90 percent by weight of an alkenyl aromatic compound and from 10 to 60 percent by weight of at least one monomer copolymerizable with the alkenyl aromatic compound, and from 5 to 35 parts by weight of an acrylonitrile-butadiene rubber, with from 5 to 50 parts by weight of a plasticizer or plasticizers added to the 100 parts by weight of the resinous mixture.

    摘要翻译： 通过混合45至70重量份的选自聚氯乙烯和共聚物的刚性热塑性树脂制备的高耐候性，可热成形的片材，其主要由氯乙烯和少量单烯烃 可与氯乙烯共聚的单体，20〜50重量份通过接枝聚合20〜40重量份的乙烯 - 丙烯共聚物橡胶或乙烯 - 丙烯 - 二烯三元共聚物得到的热塑性树脂，其含量为60〜80 由40至90重量％的烯基芳族化合物和10至60重量％的至少一种可与链烯基芳族化合物共聚的单体组成的乙烯基单体混合物重量份，以及5至35重量份 的丙烯腈 - 丁二烯橡胶，与100重量份树脂混合物一起加入5至50重量份的增塑剂或增塑剂。

    Semiconductor device having trench gate VDMOSFET and method of manufacturing the same
    15.
    发明授权
    Semiconductor device having trench gate VDMOSFET and method of manufacturing the same 有权
    具有沟槽栅极VDMOSFET的半导体器件及其制造方法

    公开(公告)号：US08384152B2

    公开(公告)日：2013-02-26

    申请号：US12232582

    申请日：2008-09-19

    申请人： Yoshikazu Nakagawa ,  Naoki Izumi ,  Masaki Nagata

    发明人： Yoshikazu Nakagawa ,  Naoki Izumi ,  Masaki Nagata

    IPC分类号： H01L29/66

    CPC分类号： H01L29/7813 ,  H01L29/0623 ,  H01L29/0878 ,  H01L29/41775 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4925 ,  H01L29/512 ,  H01L29/66734

    摘要： A semiconductor device includes a first conductivity type layer of a first conductivity type, a body layer of a second conductivity type formed on the first conductivity type layer, a gate trench passing through the body layer so that the deepest portion thereof reaches the first conductivity type layer, a source region of the first conductivity type formed around the gate trench on the surface layer portion of the body layer, a gate insulating film formed on the bottom surface and the side surface of the gate trench, and a gate electrode embedded in the gate trench through the gate insulating film, and the bottom surface of the gate electrode and the upper surface of the first conductivity type layer are flush with each other.

    摘要翻译： 半导体器件包括第一导电类型的第一导电类型，形成在第一导电类型层上的第二导电类型的主体层，穿过主体层的栅极沟槽，使得其最深部分达到第一导电类型 层，形成在主体层的表层部分上的栅极沟槽周围的第一导电类型的源极区，形成在栅极沟槽的底表面和侧表面上的栅极绝缘膜，以及嵌入在栅极电极中的栅电极 通过栅极绝缘膜的栅极沟槽，栅电极的底表面和第一导电类型层的上表面彼此齐平。

    Micro-structure formed of thin films
    16.
    发明申请
    Micro-structure formed of thin films 审中-公开
    薄膜微结构

    公开(公告)号：US20070065595A1

    公开(公告)日：2007-03-22

    申请号：US11601780

    申请日：2006-11-20

    申请人： Takayuki Yamada ,  Mutsuya Takahashi ,  Masaki Nagata

    发明人： Takayuki Yamada ,  Mutsuya Takahashi ,  Masaki Nagata

    IPC分类号： C23C14/02

    CPC分类号： B81C99/008 ,  B29C64/00 ,  B33Y10/00 ,  B33Y30/00 ,  B81B2201/035 ,  B81C2201/0197 ,  Y10T156/12 ,  Y10T156/13 ,  Y10T156/14 ,  Y10T428/24355

    摘要： A substrate on which a plurality of thin films having a plurality of cross-sections corresponding to the cross-section of a micro-structure are formed is placed on a substrate holder. The substrate holder is elevated to bond a thin film formed on the substrate to the surface of a stage, and by lowering the substrate holder, the thin film is separated from the substrate and transferred to the stage side. The transfer process is repeated to laminate a plurality of thin films on the stage and to form the micro-structure. Accordingly, there are provided a micro-structure having high dimensional precision, especially high resolution in the lamination direction, which can be manufactured from a metal or an insulator such as ceramics and can be manufactured in the combined form of structural elements together, and a manufacturing method and an apparatus thereof.

    摘要翻译： 其上形成有多个与微结构的横截面相对应的多个横截面的薄膜的基板被放置在基板支架上。 衬底保持器被升高以将形成在衬底上的薄膜粘合到台的表面上，并且通过降低衬底保持器，将薄膜与衬底分离并转移到平台侧。 重复转印过程以在台上层压多个薄膜并形成微结构。 因此，提供了可以由诸如陶瓷的金属或绝缘体制造的具有高尺寸精度，特别是层压方向上的高分辨率的微结构，并且可以以结构元件的组合形式一起制造，并且 制造方法及其装置。

    Semiconductor device
    20.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08836021B2

    公开(公告)日：2014-09-16

    申请号：US13366259

    申请日：2012-02-03

    申请人： Masaki Nagata

    发明人： Masaki Nagata

    IPC分类号： H01L29/66 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L29/08

    CPC分类号： H01L29/7813 ,  H01L21/265 ,  H01L21/30604 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/16 ,  H01L29/41741 ,  H01L29/41783 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66734

    摘要： A semiconductor device includes an active region, a gate conductor and a source electrode. The active region includes a drain region, a channel region stacked on the drain region, and a source region stacked on the channel region. The active region is formed of a silicon semiconductor layer. The gate conductor is embedded within a trench, which is formed from the source region to the drain region penetrating through the channel region. The source electrode is formed to come in contact with the source region and includes an adhesion layer. The source electrode is formed of a metal layer having a film thickness of 150 Å or smaller. The interface between the source electrode and the source region is silicidized.

    摘要翻译： 半导体器件包括有源区，栅极导体和源电极。 有源区域包括漏极区域，堆叠在漏极区域上的沟道区域和堆叠在沟道区域上的源极区域。 有源区由硅半导体层形成。 栅极导体嵌入沟槽内，该沟槽由穿透沟道区的源极区域到漏极区域形成。 源电极形成为与源极区域接触并且包括粘附层。 源极由膜厚为150以下的金属层形成。 源电极和源极区之间的界面被硅化。