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公开(公告)号：US07023043B2
公开(公告)日：2006-04-04
申请号：US10039215
申请日：2002-01-03
IPC分类号： H01L29/62
CPC分类号： H01L28/65 , H01L21/31637 , H01L21/31691 , H01L23/5222 , H01L27/10852 , H01L28/56 , H01L28/60 , H01L2924/0002 , H01L2924/00
摘要： An improved charge storing device and methods for providing the same, the charge storing device comprising a conductor-insulator-conductor (CIC) sandwich. The CIC sandwich comprises a first conducting layer deposited on a semiconductor integrated circuit. The CIC sandwich further comprises a first insulating layer deposited over the first conducting layer in a flush manner. The first insulating layer comprises a structure having a plurality of oxygen cites and a plurality of oxygen atoms that partially fill the oxygen cites, wherein the unfilled oxygen cites define a concentration of oxygen vacancies. The CIC sandwich further comprises a second conducting layer deposited over the first insulating layer in a strongly oxidizing ambient so as to reduce the concentration of oxygen vacancies in the first insulating layer, so as to provide an oxygen-rich interface layer between the first insulating layer and the second conducting layer, and so as to trap a plurality of oxygen atoms within the second conducting layer. The oxygen-rich interface layer and second conducting layer act as oxygen vacancy sinks for absorbing migrating oxygen vacancies that originate from the first insulating layer to thereby reduce the concentration of oxygen vacancies in the first insulating layer and to thereby reduce the buildup of oxygen vacancies at the interface layer. Thus, the first insulating layer provides an increased dielectric constant and an increased resistance to current flowing therethrough so as to increase the capacitance of the CIC sandwich and so as to reduce leakage currents flowing through the CIC sandwich.
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公开(公告)号：US06855594B1
公开(公告)日：2005-02-15
申请号：US10636035
申请日：2003-08-06
IPC分类号： H01G4/08 , H01G4/12 , H01G4/33 , H01L21/02 , H01L21/316 , H01L21/8242 , H01L21/00
CPC分类号： H01G4/085 , H01G4/1272 , H01G4/33 , H01L21/02178 , H01L21/0228 , H01L21/31616 , H01L21/31683 , H01L28/40
摘要： A method of forming a capacitor includes forming a conductive metal first electrode layer over a substrate, with the conductive metal being oxidizable to a higher degree at and above an oxidation temperature as compared to any degree of oxidation below the oxidation temperature. At least one oxygen containing vapor precursor is fed to the conductive metal first electrode layer below the oxidation temperature under conditions effective to form a first portion oxide material of a capacitor dielectric region over the conductive metal first electrode layer. At least one vapor precursor is fed over the first portion at a temperature above the oxidation temperature effective to form a second portion oxide material of the capacitor dielectric region over the first portion. The oxide material of the first portion and the oxide material of the second portion are common in chemical composition. A conductive second electrode layer is formed over the second portion oxide material of the capacitor dielectric region.
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13.发明授权Methods of forming capacitor constructions, and methods of forming constructions comprising dielectric materials 失效形成电容器结构的方法，以及形成包括电介质材料的构造的方法公开(公告)号：US06812110B1
公开(公告)日：2004-11-02
申请号：US10435103
申请日：2003-05-09
申请人： Cem Basceri , F. Daniel Gealy , Gurtej S Sandhu
发明人： Cem Basceri , F. Daniel Gealy , Gurtej S Sandhu
IPC分类号： H01L2120
CPC分类号： H01L27/10855 , H01L27/10852 , H01L28/40 , H01L28/57
摘要： The invention includes methods in which metal oxide dielectric materials are deposited over barrier layers. The barrier layers can comprise compositions of metal and one or more of carbon, boron and nitrogen, and the metal oxide of the dielectric material can comprise the same metal as the barrier layer. The dielectric material/barrier layer constructions can be incorporated into capacitors. The capacitors can be used in, for example, DRAM cells, which in turn can be used in electronic systems.
摘要翻译： 本发明包括其中金属氧化物介电材料沉积在阻挡层上的方法。 阻挡层可以包括金属和碳，硼和氮中的一种或多种的组合物，并且介电材料的金属氧化物可以包含与阻挡层相同的金属。 电介质材料/阻挡层结构可以结合到电容器中。 电容器可以用在例如DRAM单元中，DRAM单元又可以用在电子系统中。
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14.发明授权公开(公告)号：US06806187B2
公开(公告)日：2004-10-19
申请号：US10015811
申请日：2001-11-02
IPC分类号： H01L2144
CPC分类号： H01L21/7687 , H01L21/28518 , H01L21/76829 , H01L21/76831 , H01L21/76855 , H01L21/76897 , H01L23/485 , H01L27/10855 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/60 , H01L28/75 , H01L2924/0002 , H01L2924/00
摘要： An electrical contact includes a non-conductive spacer surrounding conductive plug material along the full height of the contact. The spacer inhibits oxide and other diffusion through the contact. In the illustrated embodiment, the contact includes metals or metal oxides which are resistant to oxidation, and additional conductive barrier layers. The contact is particularly useful in integrated circuits which include high dielectric constant materials.
摘要翻译： 电触点包括围绕接触的整个高度的导电插塞材料的非导电间隔物。 间隔物通过接触体阻止氧化物和其它扩散。 在所示实施例中，触点包括耐氧化的金属或金属氧化物，以及附加的导电阻挡层。 该接触在包括高介电常数材料的集成电路中特别有用。
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公开(公告)号：US06773981B1
公开(公告)日：2004-08-10
申请号：US09630850
申请日：2000-08-02
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/31604 , H01L27/10852
摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si—Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极包括在导电金属氧化物层上方的导电硅包含层，在导电的钛包覆层之上。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。
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公开(公告)号：US06753271B2
公开(公告)日：2004-06-22
申请号：US10222282
申请日：2002-08-15
申请人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： H01L2144
CPC分类号： H01L21/32051 , C23C16/4404 , C23C16/4405 , C23C16/45531 , C23C16/45534 , H01L21/02178 , H01L21/02186 , H01L21/0228 , H01L21/28562 , H01L21/3141 , H01L21/31616
摘要： The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.
摘要翻译： 本发明包括在基板上形成沉积的组合物层的原子层沉积方法。 该方法包括将半导体衬底定位在原子层沉积室内。 在基材上形成中间组合物单层，随后是与中间体组合物反应所需的沉积组合物，统称为将多种不同的组合物沉积前体流到沉积室内的基底。 材料粘附到室内部件表面，从而依次形成。 在这种顺序形成之后，反应性气体流入到与多种不同的沉积前体不同的组合物中，并有效地与这种粘附材料反应。 在反应气体流动之后，重复这种顺序形成。 考虑进一步的实现。
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公开(公告)号：US06689657B2
公开(公告)日：2004-02-10
申请号：US10159695
申请日：2002-05-30
IPC分类号： H01L218242
CPC分类号： H01L28/90 , H01G4/33 , H01L23/5223 , H01L28/55 , H01L28/65 , H01L28/84 , H01L28/91 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a capacitor. The method includes forming a substrate assembly having an interconnect recessed therein, and forming a first electrode on the interconnect. The first electrode includes a material selected from the group consisting of transition metals, conductive oxides, alloys thereof, and combinations thereof. The method further includes forming a second electrode, and forming a dielectric between the first and second electrodes.
摘要翻译： 一种形成电容器的方法。 该方法包括形成具有凹入其中的互连的衬底组件，并且在互连上形成第一电极。 第一电极包括选自过渡金属，导电氧化物，其合金及其组合的材料。 该方法还包括形成第二电极，以及在第一和第二电极之间形成电介质。
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公开(公告)号：US06400552B2
公开(公告)日：2002-06-04
申请号：US09846520
申请日：2001-04-30
IPC分类号： H01G406
CPC分类号： H01L28/40 , H01L21/31604 , H01L27/10852
摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor includes a capacitor dielectric layer including Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode includes a conductive metal oxide. A more preferred second capacitor electrode includes a conductive silicon including layer, over a conductive titanium including layer, over a conductive metal oxide layer. A preferred first capacitor electrode includes a conductively doped Si—Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极在导电金属氧化物层之上包括在导电的钛包覆层之上的包括导电硅的层。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。
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19.发明授权Multilayer electrode for ferroelectric and high dielectric constant capacitors 失效用于铁电和高介电常数电容器的多层电极公开(公告)号：US06297527B1
公开(公告)日：2001-10-02
申请号：US09310408
申请日：1999-05-12
IPC分类号： H01L31119
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.
摘要翻译： 一种铁电或高介电常数电容器，其具有包括至少两层的多层下电极 - 铂层和铂 - 铑层，用于随机存取存储器（RAM）单元。 下电极的铂层与电容器电介质接触，电容器电介质是铁电或高介电常数电介质，如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。 还公开了用于制造多层下电极和电容器的工艺。
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公开(公告)号：US06191443B1
公开(公告)日：2001-02-20
申请号：US09033063
申请日：1998-02-28
IPC分类号： H01L2972
CPC分类号： H01L28/40 , H01L21/31604 , H01L27/10852
摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si-Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极包括在导电金属氧化物层上方的导电硅包含层，在导电的钛包覆层之上。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。
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