公开(公告)号：US11011378B2

公开(公告)日：2021-05-18

申请号：US16459079

申请日：2019-07-01

Applicant: Micron Technology, Inc.

Inventor： Yiping Wang ,  Caizhi Xu ,  Pengyuan Zheng ,  Ying Rui ,  Russell A. Benson ,  Yongjun J. Hu ,  Jaydeb Goswami

IPC: H01L21/033 ,  H01L27/108 ,  H01L21/308

Abstract: Systems, apparatuses, and methods related to atom implantation for reduction of compressive stress are described. An example method may include patterning a working surface of a semiconductor, the working surface having a hard mask material formed over a dielectric material and forming a material having a lower refractive index (RI), relative to a RI of the hard mask material, over the hard mask material. The method may further include implanting atoms through the lower RI material and into the hard mask material to reduce the compressive stress in the hard mask material.

公开(公告)号：US20200321340A1

公开(公告)日：2020-10-08

申请号：US16906718

申请日：2020-06-19

Applicant: Micron Technology, Inc.

Inventor： Kentaro Ishii ,  Yongjun J. Hu ,  Amirhasan Nourbakhsh ,  Durai Vishak Nirmal Ramaswamy ,  Christopher W. Petz ,  Luca Fumagalli

IPC: H01L27/108

Abstract: A method of forming an apparatus comprises forming a first metal nitride material over an upper surface of a conductive material within an opening extending through at least one dielectric material through a non-conformal deposition process. A second metal nitride material is formed over an upper surface of the first metal nitride material and side surfaces of the at least one dielectric material partially defining boundaries of the opening through a conformal deposition process. A conductive structure is formed over surfaces of the second metal nitride material within the opening. Apparatuses and electronic systems are also described.

公开(公告)号：US12170250B2

公开(公告)日：2024-12-17

申请号：US18157962

申请日：2023-01-23

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  John D. Hopkins ,  Everett A. McTeer ,  Yiping Wang ,  Rajesh Balachandran ,  Rita J. Klein ,  Yongjun J. Hu

IPC: H01L23/538 ,  G11C5/02 ,  G11C5/06 ,  H01L21/768 ,  H01L23/532 ,  H01L27/06

Abstract: A microelectronic device comprises a stack structure comprising insulative levels vertically interleaved with conductive levels. The conductive levels individually comprise a first conductive structure, and a second conductive structure laterally neighboring the first conductive structure, the second conductive structure exhibiting a concentration of β-phase tungsten varying with a vertical distance from a vertically neighboring insulative level. The microelectronic device further comprises slot structures vertically extending through the stack structure and dividing the stack structure into block structures, and strings of memory cells vertically extending through the stack structure, the first conductive structures between laterally neighboring strings of memory cells, the second conductive structures between the slot structures and strings of memory cells nearest the slot structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US11672191B2

公开(公告)日：2023-06-06

申请号：US17162071

申请日：2021-01-29

Applicant: Micron Technology, Inc.

Inventor： Tsz W. Chan ,  D. V. Nirmal Ramaswamy ,  Qian Tao ,  Yongjun J. Hu ,  Everett A. McTeer

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/145 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/1608

Abstract: A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.

公开(公告)号：US11594495B2

公开(公告)日：2023-02-28

申请号：US17209993

申请日：2021-03-23

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  John D. Hopkins ,  Everett A. McTeer ,  Yiping Wang ,  Rajesh Balachandran ,  Rita J. Klein ,  Yongjun J. Hu

IPC: H01L23/538 ,  H01L23/532 ,  H01L21/768 ,  G11C5/06 ,  G11C5/02 ,  H01L27/06

Abstract: A microelectronic device comprises a stack structure comprising insulative levels vertically interleaved with conductive levels. The conductive levels individually comprise a first conductive structure, and a second conductive structure laterally neighboring the first conductive structure, the second conductive structure exhibiting a concentration of β-phase tungsten varying with a vertical distance from a vertically neighboring insulative level. The microelectronic device further comprises slot structures vertically extending through the stack structure and dividing the stack structure into block structures, and strings of memory cells vertically extending through the stack structure, the first conductive structures between laterally neighboring strings of memory cells, the second conductive structures between the slot structures and strings of memory cells nearest the slot structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20210249598A1

公开(公告)日：2021-08-12

申请号：US16788204

申请日：2020-02-11

Applicant: Micron Technology, Inc.

Inventor： Pengyuan Zheng ,  Enrico Varesi ,  Lorenzo Fratin ,  Dale Collins ,  Yongjun J. Hu

IPC: H01L45/00 ,  C23C14/06 ,  C23C14/34 ,  H01L27/24

Abstract: Methods, systems, and devices for composite electrode material chemistry are described. A memory device may include an access line, a storage element comprising chalcogenide, and an electrode coupled with the memory element and the access line. The electrode may be made of a composition of a first material doped with a second material. The second material may include a tantalum-carbon compound. In some cases, the second may be operable to be chemically inert with the storage element. The second material may include a thermally stable electrical resistivity and a lower resistance to signals communicated between the access line and the storage element across a range of operating temperatures of the storage element as compared with a resistance of the first material.

公开(公告)号：US20210050252A1

公开(公告)日：2021-02-18

申请号：US16542507

申请日：2019-08-16

Applicant: Micron Technology, Inc.

Inventor： Xiaosong Zhang ,  Yongjun J. Hu ,  David A. Kewley ,  Md Zahid Hossain ,  Michael J. Irwin ,  Daniel Billingsley ,  Suresh Ramarajan ,  Robert J. Hanson ,  Biow Hiem Ong ,  Keen Wah Chow

IPC: H01L21/768

Abstract: An apparatus comprises a structure including an upper insulating material overlying a lower insulating material, a conductive element underlying the lower insulating material, and a conductive material comprising a metal line and a contact. The conductive material extends from an upper surface of the upper insulating material to an upper surface of the conductive element. The structure also comprises a liner material adjacent the metal line. A width of an uppermost surface of the conductive material of the metal line external to the contact is relatively less than a width of an uppermost surface of the conductive material of the contact. Related methods, memory devices, and electronic systems are disclosed.

公开(公告)号：US10903276B2

公开(公告)日：2021-01-26

申请号：US16685276

申请日：2019-11-15

Applicant: Micron Technology, Inc.

Inventor： Tsz Wah Chan ,  Yongjun J. Hu ,  Swapnil Lengade

IPC: H01L27/24 ,  H01L45/00 ,  H01L23/528 ,  H01L23/532

Abstract: The disclosed technology relates to integrate circuits, including memory devices. A method of forming an integrated circuit comprises providing a surface comprising a first region and a second region, wherein the first region is formed of a different material than the second region. The method additionally comprises forming a seeding material in contact with and across the first and second regions. The method further comprises forming a metal comprising tungsten on the seeding material.

公开(公告)号：US20200091244A1

公开(公告)日：2020-03-19

申请号：US16685276

申请日：2019-11-15

Applicant: Micron Technology, Inc.

Inventor： Tsz Wah Chan ,  Yongjun J. Hu ,  Swapnil Lengade

IPC: H01L27/24 ,  H01L45/00 ,  H01L23/528 ,  H01L23/532

Abstract: The disclosed technology relates to integrate circuits, including memory devices. A method of forming an integrated circuit comprises providing a surface comprising a first region and a second region, wherein the first region is formed of a different material than the second region. The method additionally comprises forming a seeding material in contact with and across the first and second regions. The method further comprises forming a metal comprising tungsten on the seeding material.

公开(公告)号：US20170229516A1

公开(公告)日：2017-08-10

申请号：US15439727

申请日：2017-02-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Tsz Wah Chan ,  Yongjun J. Hu ,  Swapnil Lengade

IPC: H01L27/24 ,  H01L23/532 ,  H01L45/00 ,  H01L23/528

Abstract: The disclosed technology relates to integrate circuits, including memory devices. A method of forming an integrated circuit comprises providing a surface comprising a first region and a second region, wherein the first region is formed of a different material than the second region. The method additionally comprises forming a seeding material in contact with and across the first and second regions. The method further comprises forming a metal comprising tungsten on the seeding material.