Silicon-on-insulator CMOS device and a liquid crystal display with
controlled base insulator thickness
    11.
    发明授权
    Silicon-on-insulator CMOS device and a liquid crystal display with controlled base insulator thickness 失效
    绝缘体上硅CMOS器件和具有受控基极绝缘体厚度的液晶显示器

    公开(公告)号:US5434441A

    公开(公告)日:1995-07-18

    申请号:US285535

    申请日:1994-08-04

    IPC分类号: H01L27/12 H01L27/01 H01L27/13

    CPC分类号: H01L27/1203

    摘要: A semiconductor device has an NMOS transistor and a PMOS transistor formed on at least one monocrystal Si region formed in a thin-film Si layer formed on an insulation layer. The thickness T.sub.BOX of the insulation layer on which the NMOS and PMOS transistors are formed, the voltage V.sub.SS of a low-voltage power supply and the voltage V.sub.DD of a high-voltage power supply for the NMOS and PMOS transistors satisfy a relationship expressed by the following inequality:T.sub.BOX >(V.sub.DD -V.sub.SS -K.sub.2)/K.sub.1where K.sub.1 .tbd..epsilon..sub.BOX.sup.-1 (Q.sub.BN +Q.sub.BP), K.sub.2 .tbd..phi..sub.FN +.phi..sub.FP, .epsilon..sub.BOX is the dielectric constant of the base insulation layer, Q.sub.BN and Q.sub.BP are bulk charges when the widths of depletion layers of the NMOS and PMOS transistors are maximized, and .phi..sub.FN and .phi..sub.FP are pseudo Fermi potentials of the NMOS and PMOS transistors.

    摘要翻译: 半导体器件具有形成在形成在绝缘层上的薄膜Si层中形成的至少一个单晶Si区上的NMOS晶体管和PMOS晶体管。 形成NMOS和PMOS晶体管的绝缘层的厚度TBOX,低压电源的电压VSS和NMOS和PMOS晶体管的高压电源的电压VDD满足由 以下不等式:TBOX>(VDD-VSS-K2)/ K1其中K1 3BONDεBOX-1(QBN + QBP),K2 3BOND phi FN + phi FP,εBOX是基极绝缘层的介电常数,QBN和QBP是 当NMOS和PMOS晶体管的耗尽层的宽度最大化时,大量电荷,以及phi FN和phi FP是NMOS和PMOS晶体管的伪费米电位。

    Semiconductor device, and operating device, signal converter, and signal processing system using the same semiconductor device
    12.
    发明授权
    Semiconductor device, and operating device, signal converter, and signal processing system using the same semiconductor device 失效
    半导体器件,以及使用相同半导体器件的操作器件,信号转换器和信号处理系统

    公开(公告)号:US06407442B2

    公开(公告)日:2002-06-18

    申请号:US08548545

    申请日:1995-10-26

    IPC分类号: H01L2900

    摘要: In a semiconductor device which has capacitors respectively connected to multiple input terminals, and in which the remaining terminals of the capacitors are commonly connected to a sense amplifier, the capacitors and the sense amplifier are formed by utilizing a semiconductor layer on an insulating surface, whereby high-speed, high-precision processing of signals having a large number of bits supplied from the multiple input terminals is realized by a small circuit scale.

    摘要翻译: 在具有分别连接到多个输入端子的电容器并且其中电容器的其余端子共同连接到读出放大器的半导体器件中,通过在绝缘表面上利用半导体层形成电容器和读出放大器,由此 通过小电路规模实现了从多个输入端子提供的具有大量位的信号的高速,高精度处理。

    Method for manufacturing semiconductor substrate
    16.
    发明授权
    Method for manufacturing semiconductor substrate 失效
    半导体衬底的制造方法

    公开(公告)号:US5773355A

    公开(公告)日:1998-06-30

    申请号:US864904

    申请日:1997-05-29

    摘要: A semiconductor substrate includes a semiconductor layer, where the density of an impurity is reduced by out diffusion, provided on an insulating layer. In a method for manufacturing such a semiconductor substrate, a semiconductor substrate including a high-density impurity layer at the side of its surface is bonded to another substrate having an insulating layer. Thereafter, the semiconductor substrate is removed, and the impurity density of the remaining high-density impurity layer is reduced by out diffusion.

    摘要翻译: 半导体衬底包括设置在绝缘层上的杂质浓度由于扩散而减小的半导体层。 在制造这种半导体衬底的方法中,将包括其表面侧的高密度杂质层的半导体衬底接合到具有绝缘层的另一衬底上。 此后,去除半导体衬底,并且通过扩散来减小剩余的高密度杂质层的杂质浓度。