公开(公告)号：US20220223491A1

公开(公告)日：2022-07-14

申请号：US17545015

申请日：2021-12-08

Applicant: MEDIATEK INC.

Inventor： Che-Hung KUO ,  Hsing-Chih LIU ,  Chia-Hao HSU

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor package structure includes a first redistribution layer, a semiconductor die, a thermal spreader, and a molding material. The semiconductor die is disposed over the first redistribution layer. The thermal spreader is disposed over the semiconductor die. The molding material surrounds the semiconductor die and the thermal spreader.

公开(公告)号：US20160268233A1

公开(公告)日：2016-09-15

申请号：US15012018

申请日：2016-02-01

Applicant: MediaTek Inc.

Inventor： Che-Hung KUO ,  Ying-Chih CHEN ,  Che-Ya CHOU

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48265 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

Abstract translation: 本发明提供一种半导体封装组件。 半导体封装组件包括第一衬底。 第一半导体管芯设置在第一衬底上。 无源器件直接位于第一半导体管芯上。 无源器件在平面图中设置在第一半导体管芯的边界内。

公开(公告)号：US20220223512A1

公开(公告)日：2022-07-14

申请号：US17546191

申请日：2021-12-09

Applicant: MEDIATEK INC.

Inventor： Che-Hung KUO ,  Hsing-Chih LIU ,  Tai-Yu CHEN

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/48 ,  H01L23/64

Abstract: A semiconductor package structure includes a frontside redistribution layer, a first semiconductor die, a first capacitor, a conductive terminal, and a backside redistribution layer. The first semiconductor die is disposed over the frontside redistribution layer. The first capacitor is disposed over the frontside redistribution layer and electrically coupled to the first semiconductor die. The conductive terminal is disposed below the frontside redistribution layer and electrically coupled to the frontside redistribution layer. The backside redistribution layer is disposed over the first semiconductor die.

公开(公告)号：US20220013441A1

公开(公告)日：2022-01-13

申请号：US17363459

申请日：2021-06-30

Applicant: MEDIATEK INC.

Inventor： Hsing-Chih LIU ,  Zheng ZENG ,  Che-Hung KUO

IPC: H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor package structure includes a frontside redistribution layer, a stacking structure, a backside redistribution layer, a first intellectual property (IP) core, and a second IP core. The stacking structure is disposed over the frontside redistribution layer and comprises a first semiconductor die and a second semiconductor die over the first semiconductor die. The backside redistribution layer is disposed over the stacking structure. The first IP core is disposed in the stacking structure and is electrically coupled to the frontside redistribution layer through a first routing channel. The second IP core is disposed in the stacking structure and is electrically coupled to the backside redistribution layer through a second routing channel, wherein the second routing channel is separated from the first routing channel and electrically insulated from the frontside redistribution layer.

公开(公告)号：US20180033774A1

公开(公告)日：2018-02-01

申请号：US15726471

申请日：2017-10-06

Applicant: MediaTek Inc

Inventor： Che-Hung KUO ,  Ying-Chih CHEN ,  Che-Ya CHOU

IPC: H01L25/065 ,  H01L25/16

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48265 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

公开(公告)号：US20170084589A1

公开(公告)日：2017-03-23

申请号：US15203444

申请日：2016-07-06

Applicant: MediaTek Inc.

Inventor： Che-Hung KUO ,  Che-Ya CHOU

IPC: H01L25/10 ,  H01L23/31 ,  H01L21/683 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L25/105 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/83005

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor die including a first active surface and a first non-active surface. The semiconductor package structure also includes a second semiconductor die including a second active surface and a second non-active surface. The second semiconductor die is stacked on the first semiconductor die. The first non-active surface faces the second non-active surface. The semiconductor package structure further includes a first redistribution layer (RDL) structure. The first active surface faces the first RDL structure. In addition, the semiconductor package structure includes a second RDL structure. The second active surface faces the second RDL structure.