公开(公告)号：US20240105766A1

公开(公告)日：2024-03-28

申请号：US18531525

申请日：2023-12-06

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Masihhur R. Laskar ,  Nicholas R. Tapias ,  Darwin Franseda Fan ,  Manuj Nahar

IPC: H01L29/04 ,  H01L29/10

CPC classification number: H01L29/04 ,  H01L29/1033 ,  H10B12/00

Abstract: Methods, systems, and devices for single-crystal transistors for memory devices are described. In some examples, a cavity may be formed through at least a portion of one or more dielectric materials, which may be deposited above a deck of memory cells. The cavity may include a taper, such as a taper toward a point, or a taper having an included angle that is within a range, or a taper from a cross-sectional area to some fraction of the cross-sectional area, among other examples. A semiconductor material may be deposited in the cavity and above the one or more dielectric materials, and formed in a single crystalline arrangement based on heating and cooling the deposited semiconductor material. One or more portions of a transistor, such as a channel portion of a transistor, may be formed at least in part by doping the single crystalline arrangement of the semiconductor material.

公开(公告)号：US20240071473A1

公开(公告)日：2024-02-29

申请号：US17898150

申请日：2022-08-29

Applicant: Micron Technology, Inc.

Inventor： Yuan He ,  Fatma Arzum Simsek-Ege

IPC: G11C11/4091 ,  G11C11/408

CPC classification number: G11C11/4091 ,  G11C11/4085

Abstract: A microelectronic device is disclosed that incudes array regions individually comprising memory cells comprising access devices and storage node devices; digit lines coupled to the access devices that extend in a first direction; and word lines coupled to the access devices that extend in a second direction orthogonal to the first direction. Digit line exit regions horizontally alternate with the array regions in the first direction; sense amplifier sections comprising sense amplifier circuitry vertically overlie and horizontally overlapping the digit line exit regions; and routing structures within horizontal areas of the digit line exit regions, couple the sense amplifier circuitry of the sense amplifier sections to the digit lines.

公开(公告)号：US20240071466A1

公开(公告)日：2024-02-29

申请号：US17821646

申请日：2022-08-23

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Mingdong Cui

IPC: G11C11/408 ,  G11C11/22 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: G11C11/4085 ,  G11C11/221 ,  G11C11/2257 ,  G11C11/2259 ,  G11C11/4087 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1441

Abstract: Methods, systems, and devices for word line drivers for multiple-die memory devices are described. A memory device may include a first semiconductor die associated with at least memory cells and corresponding access lines of the memory device, and a second semiconductor die associated with at least access line driver circuitry of the memory device. The second semiconductor die may be located in contact with or otherwise adjacent to the first semiconductor die, and electrical contacts may be formed to couple the access line driver circuitry of the second semiconductor die with the access line conductors of the first semiconductor die. For example, cavities may be formed through the second semiconductor die and at least a portion of the first semiconductor die, and the electrical contacts may be formed between the semiconductor dies at least in part from forming a conductive material in the cavities.

公开(公告)号：US11817393B2

公开(公告)日：2023-11-14

申请号：US17463994

申请日：2021-09-01

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Luoqi Li ,  Marsela Pontoh

IPC: H01L23/31 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/5385 ,  H01L23/31 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/0657

Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.

公开(公告)号：US11791273B2

公开(公告)日：2023-10-17

申请号：US17500599

申请日：2021-10-13

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege

IPC: H01L23/538 ,  G11C5/06 ,  H10B12/00

CPC classification number: H01L23/5386 ,  G11C5/06 ,  H10B12/30

Abstract: A microelectronic device comprises a first microelectronic device structure and a second microelectronic device structure attached to the first microelectronic device structure. The first microelectronic device structure comprises memory arrays comprising memory cells comprising access devices and storage node devices, digit lines coupled to the access devices and extending in a first direction to a digit line exit region, and word lines coupled to the access devices and extending in a second direction to a word line exit region. The second microelectronic device structure comprises control logic devices over and in electrical communication with the memory cells. The microelectronic device further comprises contact structures individually in contact with the digit lines in the digit line exit region and in electrical communication with at least some of the control logic devices, at least one of the contact structures comprising a first cross-sectional area at an interface of the first microelectronic device structure and the second microelectronic device structure, and a second cross-sectional area at an interface of one of digit lines, the second cross-sectional area smaller than the first cross-sectional area. Related microelectronic devices, memory devices, electronic systems, and methods are also described.

公开(公告)号：US20230207505A1

公开(公告)日：2023-06-29

申请号：US17562453

申请日：2021-12-27

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Yuan He

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L27/108 ,  G11C11/408 ,  G11C11/4091

CPC classification number: H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H01L24/80 ,  H01L25/50 ,  H01L27/10805 ,  H01L27/10897 ,  G11C11/4085 ,  G11C11/4091 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/1436

Abstract: A microelectronic device comprises a microelectronic device comprises a first microelectronic device structure comprising a stack structure comprising conductive structures vertically alternating with insulative structures, a staircase structure within the stack structure, and vertical stacks of memory cells. Each vertical stack of memory cells individually comprises a vertical stack of capacitor structures, transistor structures each individually neighboring a capacitor structure of the capacitor structures, and a conductive pillar structure vertically extending through the transistor structures. The microelectronic device further comprises a second microelectronic device structure attached to the first microelectronic device structure, the second microelectronic device structure comprising a sub word line driver region comprising complementary metal-oxide-semiconductor (CMOS) circuits vertically overlying and within a horizontal area of the staircase structure, and conductive contact structures vertically extending between steps of the staircase structure and the sub word line driver region. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20230069261A1

公开(公告)日：2023-03-02

申请号：US17463994

申请日：2021-09-01

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Luoqi Li ,  Marsela Pontoh

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/31

Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.

公开(公告)号：US11587931B2

公开(公告)日：2023-02-21

申请号：US17190705

申请日：2021-03-03

Applicant: Micron Technology, Inc.

Inventor： Yuan He ,  Fatma Arzum Simsek-Ege

IPC: G11C5/00 ,  H01L27/108 ,  G11C11/4096 ,  G11C11/4091 ,  H01L27/06 ,  G11C5/10 ,  G11C11/402

Abstract: A memory device can comprise an array of memory cells comprising a plurality of vertically stacked tiers of memory cells, a respective plurality of horizontal access lines coupled to each of the plurality of tiers, and a plurality of vertical sense lines coupled to each of the plurality of tiers. The array of memory cells can further comprise a plurality of multiplexors each coupled to a respective vertical sense line and configured to electrically couple the respective vertical sense line to a horizontal sense line. The memory device can also comprise a semiconductor under the array (SuA) circuitry, comprising a plurality of sense amplifiers, each sense amplifier coupled to a respective subset of the plurality of multiplexors.

公开(公告)号：US11557592B2

公开(公告)日：2023-01-17

申请号：US17065711

申请日：2020-10-08

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Kamal M. Karda ,  Haitao Liu

IPC: H01L27/108 ,  H01L21/285 ,  H01L21/28

Abstract: An example apparatus includes a first source/drain region and a second source/drain region formed in a substrate. The first source/drain region and the second source/drain region are separated by a channel. The apparatus includes a gate opposing the channel. The gate includes noble metal nanoparticles. A sense line is coupled to the first source/drain region and a storage node is coupled to the second source/drain region.

公开(公告)号：US20230005933A1

公开(公告)日：2023-01-05

申请号：US17364379

申请日：2021-06-30

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege

IPC: H01L27/108

Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure comprising memory cells, digit lines, word lines, and at least one isolation material covering and surrounding the memory cells, the digit lines, and the word lines. An additional microelectronic device structure comprising control logic devices and at least one additional isolation material covering and surrounding the control logic devices is formed. The additional microelectronic device structure is attached to the microelectronic device structure. Contact structures are formed to extend through the at least one isolation material and the at least one additional isolation material. Some of the contact structures are coupled to some of the digit lines and some of the control logic devices. Some other of the contact structures are coupled to some of the word lines and some other of the control logic devices. Microelectronic devices, electronic systems, and additional methods are also described.