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公开(公告)号:US11621273B2
公开(公告)日:2023-04-04
申请号:US15931421
申请日:2020-05-13
Applicant: Micron Technology, Inc.
Inventor: Yiping Wang , Andrew Li , Haoyu Li , Matthew J. King , Wei Yeeng Ng , Yongjun Jeff Hu
IPC: H01L27/00 , H01L27/11582 , H01L27/11524 , H01L21/283 , H01L27/1157 , H01L21/306 , H01L27/11556
Abstract: Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US11164873B2
公开(公告)日:2021-11-02
申请号:US16420429
申请日:2019-05-23
Applicant: Micron Technology, Inc.
Inventor: Silvia Borsari , Stian E. Wood , Haoyu Li , Yiping Wang
IPC: H01L27/108 , H01L21/768 , H01L27/08
Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.
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13.
公开(公告)号:US20200185406A1
公开(公告)日:2020-06-11
申请号:US16216088
申请日:2018-12-11
Applicant: Micron Technology, Inc.
Inventor: Haoyu Li , Everett A. McTeer , Christopher W. Petz , Yongjun J. Hu
IPC: H01L27/11582 , H01L27/11556
Abstract: A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.
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公开(公告)号:US12200929B2
公开(公告)日:2025-01-14
申请号:US17408813
申请日:2021-08-23
Applicant: Micron Technology, Inc.
Inventor: Collin Howder , M. Jared Barclay , Bhavesh Bhartia , Chet E. Carter , John D. Hopkins , Andrew Li , Haoyu Li , Alyssa N. Scarbrough , Grady S. Waldo
IPC: H01L27/11582 , H10B41/27 , H10B43/27
Abstract: Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks individually comprising a first vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises vertically-alternating first insulating tiers and second insulating tiers that are of different insulative compositions relative one another. The lower portion comprises a horizontal line above the conductor tier that runs parallel with the laterally-spaced memory blocks in the first vertical stack. Other embodiments, including method, are disclosed.
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公开(公告)号:US20240379544A1
公开(公告)日:2024-11-14
申请号:US18654618
申请日:2024-05-03
Applicant: Micron Technology, Inc.
Inventor: Darwin A. Clampitt , Martin Jared Barclay , Haoyu Li
IPC: H01L23/528 , H01L21/768 , H10B41/27 , H10B43/27
Abstract: Methods, systems, and devices for low resistance staircase rivet contact using metal-to-metal strap connection are described. The described techniques provide for usage of a metallic material that adheres to a dielectric material when deposited via a chemical vapor deposition (CVD) process or atomic layer deposition (ALD) process to connect to a word line contact. For example, a strap may be formed between a layer of conductive material and a word line contact that extends at least partially through a stack of layers, and may be filled with such a metallic material. Such techniques may support a connection between the word line contact and the layer of conductive material without usage of a liner material, which may mitigate a resistance of the connection.
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公开(公告)号:US11844220B2
公开(公告)日:2023-12-12
申请号:US18074055
申请日:2022-12-02
Applicant: Micron Technology, Inc.
Inventor: Yiping Wang , Andrew Li , Haoyu Li , Matthew J. King , Wei Yeeng Ng , Yongjun Jeff Hu
IPC: H01L21/00 , H10B43/27 , H01L21/283 , H01L21/306 , H10B41/27 , H10B41/35 , H10B43/35
CPC classification number: H10B43/27 , H01L21/283 , H01L21/30608 , H10B41/27 , H10B41/35 , H10B43/35
Abstract: Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US20220020748A1
公开(公告)日:2022-01-20
申请号:US17449352
申请日:2021-09-29
Applicant: Micron Technology, Inc.
Inventor: Silvia Borsari , Stian E. Wood , Haoyu Li , Yiping Wang
IPC: H01L27/108 , H01L21/768 , H01L27/08
Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.
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公开(公告)号:US10700091B2
公开(公告)日:2020-06-30
申请号:US16431527
申请日:2019-06-04
Applicant: Micron Technology, Inc.
Inventor: David Ross Economy , John Mark Meldrim , Haoyu Li , Yongjun Jeff Hu , Christopher W. Petz , Daniel Billingsley , Everett A. McTeer
IPC: H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L21/311 , H01L27/11565 , H01L21/768 , H01L27/1157
Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.
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公开(公告)号:US10546848B2
公开(公告)日:2020-01-28
申请号:US16398433
申请日:2019-04-30
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Everett A. McTeer , Christopher W. Petz , Haoyu Li , John Mark Meldrim , Yongjun Jeff Hu
Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US10355014B1
公开(公告)日:2019-07-16
申请号:US15852989
申请日:2017-12-22
Applicant: Micron Technology, Inc.
Inventor: David Ross Economy , John Mark Meldrim , Haoyu Li , Yongjun Jeff Hu , Christopher W. Petz , Daniel Billingsley , Everett A. McTeer
IPC: H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L21/311 , H01L27/11565 , H01L21/768
Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.
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