Apparatuses including laminate spacer structures, and related memory devices, electronic systems, and methods

    公开(公告)号:US11164873B2

    公开(公告)日:2021-11-02

    申请号:US16420429

    申请日:2019-05-23

    Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.

    LOW RESISTANCE STAIRCASE RIVET CONTACT USING METAL-TO-METAL STRAP CONNECTION

    公开(公告)号:US20240379544A1

    公开(公告)日:2024-11-14

    申请号:US18654618

    申请日:2024-05-03

    Abstract: Methods, systems, and devices for low resistance staircase rivet contact using metal-to-metal strap connection are described. The described techniques provide for usage of a metallic material that adheres to a dielectric material when deposited via a chemical vapor deposition (CVD) process or atomic layer deposition (ALD) process to connect to a word line contact. For example, a strap may be formed between a layer of conductive material and a word line contact that extends at least partially through a stack of layers, and may be filled with such a metallic material. Such techniques may support a connection between the word line contact and the layer of conductive material without usage of a liner material, which may mitigate a resistance of the connection.

    METHODS OF FORMING AN APPARATUS INCLUDING LAMINATE SPACER STRUCTURES

    公开(公告)号:US20220020748A1

    公开(公告)日:2022-01-20

    申请号:US17449352

    申请日:2021-09-29

    Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.

    Integrated assemblies and methods of forming integrated assemblies

    公开(公告)号:US10546848B2

    公开(公告)日:2020-01-28

    申请号:US16398433

    申请日:2019-04-30

    Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.

    Assemblies having vertically-extending structures

    公开(公告)号:US10355014B1

    公开(公告)日:2019-07-16

    申请号:US15852989

    申请日:2017-12-22

    Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.

Patent Agency Ranking