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    WIRE BONDING FOR STACKED MEMORY DIES
    11.
    发明公开
    WIRE BONDING FOR STACKED MEMORY DIES 审中-公开

    公开(公告)号：US20240063168A1

    公开(公告)日：2024-02-22

    申请号：US17889170

    申请日：2022-08-16

    Applicant: Micron Technology, Inc.

    Inventor： See Hiong Leow ,  Hong Wan NG ,  Seng Kim Ye ,  Kelvin Aik Boo Tan ,  Ling Pan

    IPC: H01L23/00 ,  H01L27/105

    CPC classification number: H01L24/48 ,  H01L27/1052 ,  H01L2224/48105

    Abstract: Methods, systems, and devices for wire bonding for stacked memory dies are described. A memory system may include a stack of memory dies. As the stack grows to include more and more memory dies, the length of the wires coupling the memory dies with the control circuit may increase. Bonding multiple wires using an adhesive may increase a gap between neighboring wires coupled with the same memory die or different memory dies. For example, bonding one wire to a neighboring wire may pull one or both of the bonded wires away from their original placement, increasing a gap between the bonded wires and one or more neighboring wires. Bonding the wires coupled with a lower memory die may increase a gap such that sagging wires coupled with an upper memory die may be positioned in the gap to avoid shorting with the lower wires.

    THERMAL DISTRIBUTION NETWORK FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS
    13.
    发明申请
    THERMAL DISTRIBUTION NETWORK FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS 有权

    公开(公告)号：US20230061803A1

    公开(公告)日：2023-03-02

    申请号：US17460126

    申请日：2021-08-27

    Applicant: Micron Technology, Inc.

    Inventor： Ling Pan ,  Sook Har Leong ,  Kelvin Tan Aik Boo

    IPC: H01L23/373 ,  H01L25/065 ,  H01L21/50

    Abstract: Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments the semiconductor devices include a package substrate, a controller die carried by the package substrate and a spacer carried by the package substrate spaced apart from the controller die. A thermally conductive material can be carried by an upper surface of the controller die and establish a thermal path extending from the upper surface of the controller die to the package substrate. The thermal path can reach the package substrate at a position horizontally between the controller die and the spacer. The semiconductor device can also include one or more dies at least partially carried by the spacer and at least partially above the controller die and the thermally conductive material. Each of the one or more dies is thermally insulated from the thermally conductive material, for example by a thermal adhesive layer between the two.

    SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT
    17.
    发明公开
    SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT 审中-公开

    公开(公告)号：US20240071881A1

    公开(公告)日：2024-02-29

    申请号：US17894063

    申请日：2022-08-23

    Applicant: Micron Technology, Inc.

    Inventor： Ling Pan ,  Wei Yu ,  Kelvin Tan Aik Boo

    IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

    CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/1403 ,  H01L2224/16227

    Abstract: A semiconductor device assembly includes a semiconductor die and a substrate coupled to the semiconductor die. The substrate includes a primary conductive layer including a first surface of the substrate and a first solder mask layer coupled to the first surface. The substrate also includes a secondary conductive layer including a second surface of the substrate and a second solder mask layer coupled to the second surface. The substrate further includes an inner conductive layer positioned between the primary layer and the secondary layer, where the inner layer includes a bond pad positioned at the end of an opening that extends from the second solder mask layer through the secondary layer to the bond pad of the inner layer. By attaching a solder ball to the bond pad of the inner layer, standoff height is reduced.

    Thermal distribution network for semiconductor devices and associated systems and methods
    18.
    发明授权
    Thermal distribution network for semiconductor devices and associated systems and methods 有权

    公开(公告)号：US11688662B2

    公开(公告)日：2023-06-27

    申请号：US17460126

    申请日：2021-08-27

    Applicant: Micron Technology, Inc.

    Inventor： Ling Pan ,  Sook Har Leong ,  Kelvin Tan Aik Boo

    IPC: H01L25/00 ,  H01L23/31 ,  H01L23/373 ,  H01L21/50 ,  H01L25/065

    CPC classification number: H01L23/373 ,  H01L21/50 ,  H01L25/0657

    Abstract: Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments the semiconductor devices include a package substrate, a controller die carried by the package substrate and a spacer carried by the package substrate spaced apart from the controller die. A thermally conductive material can be carried by an upper surface of the controller die and establish a thermal path extending from the upper surface of the controller die to the package substrate. The thermal path can reach the package substrate at a position horizontally between the controller die and the spacer. The semiconductor device can also include one or more dies at least partially carried by the spacer and at least partially above the controller die and the thermally conductive material. Each of the one or more dies is thermally insulated from the thermally conductive material, for example by a thermal adhesive layer between the two.

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