公开(公告)号：US11239128B2

公开(公告)日：2022-02-01

申请号：US16543430

申请日：2019-08-16

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong ,  Choon Kuan Lee ,  Wang Lai Lee ,  Roslan Bin Said

IPC: H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L25/10 ,  H01L25/11 ,  H01L21/58 ,  H01L21/60 ,  H01L21/98

Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

公开(公告)号：US10431513B2

公开(公告)日：2019-10-01

申请号：US15583826

申请日：2017-05-01

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong ,  Choon Kuan Lee ,  Wang Lai Lee ,  Roslan Bin Said

IPC: H01L25/10 ,  H01L25/11 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L25/00 ,  H01L21/58 ,  H01L21/60 ,  H01L23/00

Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

公开(公告)号：US20170301598A1

公开(公告)日：2017-10-19

申请号：US15583826

申请日：2017-05-01

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong ,  Choon Kuan Lee ,  Wang Lai Lee ,  Roslan Bin Said

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L25/11 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/561 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/00 ,  H01L25/105 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16055 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

公开(公告)号：US20240234390A1

公开(公告)日：2024-07-11

申请号：US18389613

申请日：2023-12-19

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Kelvin Tan Aik Boo ,  Hong Wan Ng ,  See Hiong Leow ,  Ling Pan

IPC: H01L25/16 ,  H01L23/498

CPC classification number: H01L25/16 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/48

Abstract: A microelectronic device package includes a stack of semiconductor dies positioned over a substrate. The microelectronic device package further includes an interposer structure coupled to the stack of semiconductor dies. The microelectronic device package further includes an electronic component directly coupled to the interposer structure and electrically coupled to the substrate through an electrical connection between the interposer structure and the substrate.

公开(公告)号：US20160329303A1

公开(公告)日：2016-11-10

申请号：US14705274

申请日：2015-05-06

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L27/115 ,  H01L21/48 ,  H01L25/00 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/50 ,  H01L2224/48137 ,  H01L2224/48147 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06555 ,  H01L2924/15311

Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate.

Abstract translation: 半导体器件封装包括位于插入器衬底上的半导体存储器件的堆叠，控制器元件和与控制器元件横向相邻定位的再分配衬底。 控制器元件的至少一部分直接位于堆叠和中介层基板之间。 控制器元件通过再分配基板和插入器基板可操作地连接到堆叠的半导体存储器件。 制造半导体器件封装的方法包括将再分配衬底横向邻近控制器元件定位并将再分配衬底和控制器元件附接到插入器衬底。 一组半导体存储器件位于控制器元件和再分配衬底上。 控制器元件通过再分配基板和插入器基板可操作地连接到堆叠的半导体存储器件。

公开(公告)号：US20240234403A1

公开(公告)日：2024-07-11

申请号：US18545996

申请日：2023-12-19

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Kelvin Tan Aik Boo ,  Hong Wan Ng ,  See Hiong Leow ,  Ling Pan

IPC: H01L25/18 ,  H01L21/48 ,  H01L23/498 ,  H01L25/00 ,  H10B80/00

CPC classification number: H01L25/18 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49833 ,  H01L25/50 ,  H10B80/00 ,  H01L24/48

Abstract: A microelectronic device package includes a microelectronic device coupled to a substrate. The microelectronic device package further includes a stack of semiconductor dies positioned over the microelectronic device. The microelectronic device package also includes an interposer positioned between the microelectronic device and the stack of semiconductor dies. The interposer includes a conductive structure electrically connecting the microelectronic device and a ground circuit of the substrate. The interposer further includes an insulative structure positioned between the conductive structure and the stack of semiconductor dies.

公开(公告)号：US20170358559A1

公开(公告)日：2017-12-14

申请号：US15688308

申请日：2017-08-28

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/13 ,  H01L25/00 ,  H01L23/50

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/50 ,  H01L2224/48137 ,  H01L2224/48147 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06555 ,  H01L2924/15311

Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate.

公开(公告)号：US09640458B2

公开(公告)日：2017-05-02

申请号：US14470831

申请日：2014-08-27

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong ,  Choon Kuan Lee ,  Wang Lai Lee ,  Roslan Bin Said

IPC: H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L23/12 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L25/11

CPC classification number: H01L23/3128 ,  H01L21/561 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/00 ,  H01L25/105 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16055 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

公开(公告)号：US20130341805A1

公开(公告)日：2013-12-26

申请号：US14011138

申请日：2013-08-27

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong

IPC: H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3114 ,  H01L24/48 ,  H01L25/00 ,  H01L25/043 ,  H01L25/074 ,  H01L25/0756 ,  H01L25/10 ,  H01L25/105 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4382 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.

公开(公告)号：US10861824B2

公开(公告)日：2020-12-08

申请号：US16203555

申请日：2018-11-28

Applicant: Micron Technology, Inc.

Inventor： Seng Kim Dalson Ye ,  Chin Hui Chong

IPC: H01L25/065 ,  H01L23/13 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L25/04 ,  H01L25/07 ,  H01L25/075 ,  H01L25/11

Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.