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    Techniques to update a trim parameter in non-volatile memory
    11.
    发明授权
    Techniques to update a trim parameter in non-volatile memory 有权

    公开(公告)号：US10649656B2

    公开(公告)日：2020-05-12

    申请号：US15857054

    申请日：2017-12-28

    Applicant: Micron Technology, Inc.

    Inventor： Shekoufeh Qawami ,  Doyle W. Rivers

    IPC: G11C8/00 ,  G06F3/06

    Abstract: Techniques to update a trim parameter in non-volatile memory during either a manufacturing stage or a post-manufacturing stage are described. Trim parameters may be stored in a register located within the memory device that is inaccessible by a host device during a normal mode of operation. Post-manufacturing updates to trim parameters by the host device may be feasible by creating registers located within the memory device that are accessible to the host device to provide information regarding trim parameter setting updates. The memory device may read the information from the registers accessible to the host device to update trim parameters stored in the register inaccessible by the host device. In this manner, the host device may not have a direct access to the trim parameters but still be able to provide an update to the trim parameters by updating an entry of the registers accessible by the host device.

    Techniques to update a trim parameter in non-volatile memory
    13.
    发明授权
    Techniques to update a trim parameter in non-volatile memory 有权

    公开(公告)号：US11928330B2

    公开(公告)日：2024-03-12

    申请号：US17518154

    申请日：2021-11-03

    Applicant: Micron Technology, Inc.

    Inventor： Shekoufeh Qawami ,  Doyle W. Rivers

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/0634 ,  G06F3/0679

    Abstract: Techniques to update a trim parameter in non-volatile memory during either a manufacturing stage or a post-manufacturing stage are described. Trim parameters may be stored in a register located within the memory device that is inaccessible by a host device during a normal mode of operation. Post-manufacturing updates to trim parameters by the host device may be feasible by creating registers located within the memory device that are accessible to the host device to provide information regarding trim parameter setting updates. The memory device may read the information from the registers accessible to the host device to update trim parameters stored in the register inaccessible by the host device. In this manner, the host device may not have a direct access to the trim parameters but still be able to provide an update to the trim parameters by updating an entry of the registers accessible by the host device.

    MEMORY ACCESS TECHNIQUES IN MEMORY DEVICES WITH MULTIPLE PARTITIONS
    15.
    发明申请
    MEMORY ACCESS TECHNIQUES IN MEMORY DEVICES WITH MULTIPLE PARTITIONS 审中-公开

    公开(公告)号：US20190004729A1

    公开(公告)日：2019-01-03

    申请号：US16103697

    申请日：2018-08-14

    Applicant: Micron Technology, Inc.

    Inventor： Shekoufeh Qawami ,  Rajesh Sundaram

    IPC: G06F3/06

    Abstract: Methods, systems, and devices for operating a memory array are described. A memory controller may be configured to provide enhanced bandwidth on a command/address (C/A) bus, which may have a relatively low pin count, through use of a next partition command that may repeat an array command from a current partition at a different partition indicated by the next partition command. Such a next partition command may use fewer clock cycles than a command that includes a complete instruction and memory location information.

    Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory
    17.
    发明授权
    Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory 有权

    公开(公告)号：US11354040B2

    公开(公告)日：2022-06-07

    申请号：US16926431

    申请日：2020-07-10

    Applicant: Micron Technology, Inc.

    Inventor： Rajesh Sundaram ,  Derchang Kau ,  Owen W. Jungroth ,  Daniel Chu ,  Raymond W. Zeng ,  Shekoufeh Qawami

    IPC: G06F3/06 ,  G11C8/12 ,  G11C7/10 ,  G11C16/08

    Abstract: Apparatuses and methods for performing multithread, concurrent access of different partition of a memory are disclosed herein. An example apparatus may include a non-volatile memory array comprising a plurality of partitions. Each of the plurality of partitions may include a respective plurality of memory cells. The apparatus may further include a plurality of local controllers that are each configured to independently and concurrently access a respective one of the plurality of partitions to execute a respective memory access command of a plurality of memory access commands responsive to receiving the respective memory access command. The example apparatus may further include a controller configured to receive the plurality of memory access commands and to determine a respective target partition of the plurality of partitions for each of the plurality of memory access commands. The controller may be further configured to provide each of the plurality of memory access commands to a local controller of the plurality of local controllers associated with the respective target partition.

    Techniques to update a trim parameter in nonvolatile memory
    18.
    发明授权
    Techniques to update a trim parameter in nonvolatile memory 有权

    公开(公告)号：US11194472B2

    公开(公告)日：2021-12-07

    申请号：US16848608

    申请日：2020-04-14

    Applicant: Micron Technology, inc.

    Inventor： Shekoufeh Qawami ,  Doyle W. Rivers

    IPC: G06F17/00 ,  G06F3/06

    Abstract: Techniques to update a trim parameter in non-volatile memory during either a manufacturing stage or a post-manufacturing stage are described. Trim parameters may be stored in a register located within the memory device that is inaccessible by a host device during a normal mode of operation. Post-manufacturing updates to trim parameters by the host device may be feasible by creating registers located within the memory device that are accessible to the host device to provide information regarding trim parameter setting updates. The memory device may read the information from the registers accessible to the host device to update trim parameters stored in the register inaccessible by the host device. In this manner, the host device may not have a direct access to the trim parameters but still be able to provide an update to the trim parameters by updating an entry of the registers accessible by the host device.

    Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory
    19.
    发明授权
    Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory 有权

    公开(公告)号：US10719237B2

    公开(公告)日：2020-07-21

    申请号：US14992979

    申请日：2016-01-11

    Applicant: Micron Technology, Inc.

    Inventor： Rajesh Sundaram ,  Derchang Kau ,  Owen W. Jungroth ,  Daniel Chu ,  Raymond W. Zeng ,  Shekoufeh Qawami

    IPC: G06F3/06 ,  G11C8/12 ,  G11C7/10 ,  G11C16/08

    Abstract: Apparatuses and methods for performing multithread, concurrent access of different partition of a memory are disclosed herein. An example apparatus may include a non-volatile memory array comprising a plurality of partitions. Each of the plurality of partitions may include a respective plurality of memory cells. The apparatus may further include a plurality of local controllers that are each configured to independently and concurrently access a respective one of the plurality of partitions to execute a respective memory access command of a plurality of memory access commands responsive to receiving the respective memory access command. The example apparatus may further include a controller configured to receive the plurality of memory access commands and to determine a respective target partition of the plurality of partitions for each of the plurality of memory access commands. The controller may be further configured to provide each of the plurality of memory access commands to a local controller of the plurality of local controllers associated with the respective target partition.

    TECHNIQUES TO UPDATE A TRIM PARAMETER IN NON-VOLATILE MEMORY
    20.
    发明申请
    TECHNIQUES TO UPDATE A TRIM PARAMETER IN NON-VOLATILE MEMORY 审中-公开

    公开(公告)号：US20190205030A1

    公开(公告)日：2019-07-04

    申请号：US15857054

    申请日：2017-12-28

    Applicant: Micron Technology, Inc.

    Inventor： Shekoufeh Qawami ,  Doyle W. Rivers

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/0634 ,  G06F3/0679

    Abstract: Techniques to update a trim parameter in non-volatile memory during either a manufacturing stage or a post-manufacturing stage are described. Trim parameters may be stored in a register located within the memory device that is inaccessible by a host device during a normal mode of operation. Post-manufacturing updates to trim parameters by the host device may be feasible by creating registers located within the memory device that are accessible to the host device to provide information regarding trim parameter setting updates. The memory device may read the information from the registers accessible to the host device to update trim parameters stored in the register inaccessible by the host device. In this manner, the host device may not have a direct access to the trim parameters but still be able to provide an update to the trim parameters by updating an entry of the registers accessible by the host device.

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