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    Apparatuses and methods for tracking victim rows
    12.
    发明授权
    Apparatuses and methods for tracking victim rows 有权

    公开(公告)号：US11158364B2

    公开(公告)日：2021-10-26

    申请号：US16428625

    申请日：2019-05-31

    Applicant: Micron Technology, Inc.

    Inventor： Daniel B. Penney ,  Jason M. Brown ,  Nathaniel J. Meier ,  Timothy B. Cowles ,  Jiyun Li

    IPC: G11C7/00 ,  G11C11/406 ,  G11C11/408

    Abstract: The address of victim rows may be determined based on rows that are accessed in a memory. The victim addresses may be stored and associated with a count for every time a victim row is “victimized.” When the count for a victim row reaches a threshold, the victim row may be refreshed to preserve data stored in the row. After the victim row has been refreshed, the count may be reset. When a victim row is accessed, the count may also be reset. The counts may be adjusted for closer victim rows (e.g., +/−1) at a faster rate than counts for more distant victim rows (e.g., +/−2). This may cause closer victim rows to be refreshed at a higher rate than more distant victim rows.

    NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH VOLATILE MEMORY FEATURES AND METHODS FOR OPERATING THE SAME
    13.
    发明申请
    NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH VOLATILE MEMORY FEATURES AND METHODS FOR OPERATING THE SAME 有权

    公开(公告)号：US20210295880A1

    公开(公告)日：2021-09-23

    申请号：US17339846

    申请日：2021-06-04

    Applicant: Micron Technology, Inc.

    Inventor： Timothy B. Cowles ,  George B. Raad ,  James S. Rehmeyer ,  Jonathan S. Parry

    IPC: G11C5/14 ,  G11C11/00

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices and systems are provided, in which at least a subset of a non-volatile memory array is configured to behave as a volatile memory by erasing or degrading data in the event of a changed power condition such as a power-loss event, a power-off event, or a power-on event. In one embodiment of the present technology, a memory device is provided, comprising a non-volatile memory array, and circuitry configured to store one or more addresses of the non-volatile memory array, to detect a changed power condition of the memory device, and to erase or degrade data at the one or more addresses in response to detecting the changed power condition.

    Methods for row hammer mitigation and memory devices and systems employing the same
    14.
    发明授权
    Methods for row hammer mitigation and memory devices and systems employing the same 有权

    公开(公告)号：US11087819B2

    公开(公告)日：2021-08-10

    申请号：US16597694

    申请日：2019-10-09

    Applicant: Micron Technology, Inc.

    Inventor： Timothy B. Cowles ,  Dean D. Gans ,  Jiyun Li ,  Nathaniel J. Meier ,  Randall J. Rooney

    IPC: G11C7/00 ,  G11C11/406

    Abstract: Memory devices and methods of operating memory devices in which refresh management operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., activations in excess of a predetermined threshold) warrants a refresh management operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of activations at the memory location, to schedule a refresh management operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled refresh management operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further activations at the memory location until after the count has been decreased.

    Methods for independent memory bank maintenance and memory devices and systems employing the same
    17.
    发明授权
    Methods for independent memory bank maintenance and memory devices and systems employing the same 有权

    公开(公告)号：US10541017B2

    公开(公告)日：2020-01-21

    申请号：US16543477

    申请日：2019-08-16

    Applicant: Micron Technology, Inc.

    Inventor： George B. Raad ,  Jonathan S. Parry ,  James S. Rehmeyer ,  Timothy B. Cowles

    IPC: G11C7/00 ,  G11C11/406

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices in which multiple counters are provided to permit memory refresh commands greater freedom in targeting subsets of the memory device for data refresh operations. In one embodiment, a memory device is provided, comprising a plurality of memory banks, and circuitry configured to (i) store a plurality of values, each of the plurality of values corresponding to one of the plurality of memory banks; (ii) refresh first data stored in a first one of the plurality of memory banks; and (iii) update a first one of the plurality of values corresponding to the first one of the plurality of memory banks based at least in part on refreshing the first data.

    Methods for independent memory bank maintenance and memory devices and systems employing the same
    19.
    发明授权
    Methods for independent memory bank maintenance and memory devices and systems employing the same 有权

    公开(公告)号：US10297307B1

    公开(公告)日：2019-05-21

    申请号：US15870657

    申请日：2018-01-12

    Applicant: Micron Technology, Inc.

    Inventor： George B. Raad ,  Jonathan S. Parry ,  James S. Rehmeyer ,  Timothy B. Cowles

    IPC: G11C7/00 ,  G11C11/406

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices in which multiple counters are provided to permit memory refresh commands greater freedom in targeting subsets of the memory device for data refresh operations. In one embodiment, a memory device is provided, comprising a plurality of memory banks, and circuitry configured to (i) store a plurality of values, each of the plurality of values corresponding to one of the plurality of memory banks; (ii) refresh first data stored in a first one of the plurality of memory banks; and (iii) update a first one of the plurality of values corresponding to the first one of the plurality of memory banks based at least in part on refreshing the first data.

    DATA SHIFTING
    20.
    发明申请
    DATA SHIFTING 有权
    数据移位

    公开(公告)号：US20150187395A1

    公开(公告)日：2015-07-02

    申请号：US14660219

    申请日：2015-03-17

    Applicant: Micron Technology, Inc.

    Inventor： Timothy B. Cowles ,  Steven M. Bodily

    IPC: G11C7/10 ,  G11C5/06 ,  G11C7/06

    CPC classification number: G11C7/065 ,  G11C5/06 ,  G11C7/06 ,  G11C7/08 ,  G11C7/1006 ,  G11C7/1036 ,  G11C7/22 ,  G11C8/10 ,  G11C11/4091 ,  G11C19/00 ,  G11C2207/002 ,  G11C2207/005

    Abstract: The present disclosure includes apparatuses and methods related to data shifting. An example apparatus comprises a first memory cell coupled to a first sense line of an array, a first isolation device located between the first memory cell and first sensing circuitry corresponding thereto, and a second isolation device located between the first memory cell and second sensing circuitry corresponding to a second sense line. The first and the second isolation devices are operated to shift data in the array without transferring the data via an input/output line of the array.

    Abstract translation: 本公开包括与数据移位相关的装置和方法。 示例性设备包括耦合到阵列的第一感测线的第一存储器单元，位于第一存储器单元和与其对应的第一感测电路之间的第一隔离器件，以及位于第一存储器单元和第二感测电路之间的第二隔离器件 对应于第二感测线。 操作第一和第二隔离装置以移动阵列中的数据，而不经由阵列的输入/输出线传送数据。

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