公开(公告)号：US09780107B2

公开(公告)日：2017-10-03

申请号：US14969709

申请日：2015-12-15

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Umberto M. Meotto ,  Giulio Albini ,  Paolo Tessariol ,  Paola Bacciaglia ,  Marcello Mariani

IPC: H01L21/28 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66 ,  H01L29/792 ,  H01L21/02 ,  H01L21/762 ,  H01L29/06

CPC classification number: H01L27/11568 ,  H01L21/02233 ,  H01L21/28282 ,  H01L21/76224 ,  H01L27/11573 ,  H01L29/0649 ,  H01L29/66833 ,  H01L29/792

Abstract: Methods of forming integrated circuit devices containing memory cells over a first region of a semiconductor substrate and gate structures over a second region of the semiconductor substrate recessed from the first region. The methods include forming a metal that is common to both the memory cells and the gate structures.

公开(公告)号：US09614005B2

公开(公告)日：2017-04-04

申请号：US14477680

申请日：2014-09-04

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Agostino Pirovano ,  Umberto M. Meotto

IPC: G11C13/04 ,  H01L27/24 ,  G11C13/00 ,  H01L45/00

CPC classification number: H01L45/1286 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/008 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1608

Abstract: Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device.

公开(公告)号：US20130087849A1

公开(公告)日：2013-04-11

申请号：US13687726

申请日：2012-11-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Umberto M. Meotto ,  Giulio Albini ,  Paolo Tessariol ,  Paola Bacciaglia ,  Marcello Mariani

IPC: H01L29/792

CPC classification number: H01L27/11568 ,  H01L21/02233 ,  H01L21/28282 ,  H01L21/76224 ,  H01L27/11573 ,  H01L29/0649 ,  H01L29/66833 ,  H01L29/792

Abstract: Subject matter disclosed herein relates to a method of manufacturing a semiconductor integrated circuit device, and more particularly to a method of fabricating a charge trap NAND flash memory device.

Abstract translation: 本文公开的主题涉及一种制造半导体集成电路器件的方法，更具体地说，涉及一种制造电荷阱NAND快闪存储器件的方法。

公开(公告)号：US12191249B2

公开(公告)日：2025-01-07

申请号：US17446868

申请日：2021-09-03

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Richard J. Hill ,  Umberto M. Meotto ,  Matthew Thorum

IPC: H10B43/10 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  G11C16/04

Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.

公开(公告)号：US20230073372A1

公开(公告)日：2023-03-09

申请号：US17446868

申请日：2021-09-03

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Richard J. Hill ,  Umberto M. Meotto ,  Matthew Thorum

IPC: H01L23/522 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/532

Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.

公开(公告)号：US20190140174A1

公开(公告)日：2019-05-09

申请号：US16184314

申请日：2018-11-08

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Agostino Pirovano ,  Umberto M. Meotto

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

CPC classification number: H01L45/1286 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/008 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1608

Abstract: Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device.

公开(公告)号：US10164187B2

公开(公告)日：2018-12-25

申请号：US15858780

申请日：2017-12-29

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Agostino Pirovano ,  Umberto M. Meotto

IPC: G11C13/04 ,  H01L45/00 ,  G11C13/00 ,  H01L27/24

Abstract: Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device.

公开(公告)号：US20170229644A1

公开(公告)日：2017-08-10

申请号：US15438499

申请日：2017-02-21

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Agostino Pirovano ,  Umberto M. Meotto

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1286 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/008 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1608

Abstract: Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device.

公开(公告)号：US09136471B2

公开(公告)日：2015-09-15

申请号：US14066308

申请日：2013-10-29

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Agostino Pirovano ,  Umberto M. Meotto ,  Giorgio Servalli

IPC: H01L21/82 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/06 ,  H01L23/5256 ,  H01L27/2445 ,  H01L27/2463 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1675 ,  H01L45/1683

Abstract: A resistive random access memory array may be formed on the same substrate with a fuse array. The random access memory and the fuse array may use the same active material. For example, both the fuse array and the memory array may use a chalcogenide material as the active switching material. The main array may use a pattern of perpendicular sets of trench isolations and the fuse array may only use one set of parallel trench isolations. As a result, the fuse array may have a conductive line extending continuously between adjacent trench isolations. In some embodiments, this continuous line may reduce the resistance of the conductive path through the fuses.

Abstract translation: 可以在具有熔丝阵列的同一基板上形成电阻随机存取存储器阵列。 随机存取存储器和熔丝阵列可以使用相同的活性材料。 例如，熔丝阵列和存储器阵列都可以使用硫族化物材料作为有源开关材料。 主阵列可以使用垂直组沟槽隔离的图案，并且熔丝阵列可以仅使用一组平行沟槽隔离。 结果，熔丝阵列可以具有在相邻沟槽隔离之间连续延伸的导电线。 在一些实施例中，该连续线可以减小通过保险丝的导电路径的电阻。