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54 条记录 (耗时 0.026 秒)

    Device and method for correcting a path trouble in a communication network
    11.
    发明申请
    Device and method for correcting a path trouble in a communication network 失效
    用于校正通信网络中的路径故障的装置和方法

    公开(公告)号：US20060256712A1

    公开(公告)日：2006-11-16

    申请号：US10546379

    申请日：2004-02-20

    申请人： Wataru Imajuku ,  Katsuhiro Shimano ,  Yoshihiro Takikawa ,  Eiji Oki ,  Yasutaka Okazaki

    发明人： Wataru Imajuku ,  Katsuhiro Shimano ,  Yoshihiro Takikawa ,  Eiji Oki ,  Yasutaka Okazaki

    IPC分类号： H04J3/14

    CPC分类号： H04J14/0295 ,  H04J14/0284 ,  H04J14/0291 ,  H04L45/00 ,  H04L45/22 ,  H04Q11/0062 ,  H04Q2011/0073 ,  H04Q2011/0081 ,  H04Q2011/0088

    摘要： In a disclosed backup path bandwidth keeping method for keeping bandwidth of a backup path to which an active path is switched when the active path becomes unavailable in nodes of a communication network, each node is connected to the same destination, and the method includes a backup path bandwidth keeping phase, for M (M is a natural number equal to or less than L) channels in L (L is a natural number) channels kept as backup path bandwidth, for notifying a destination-side node existing in a destination side of the backup path of identification number information of the M channels to be kept and identification information indicating that a path for which the bandwidth is to be kept is a backup path.

    摘要翻译： 在公开的备用路径带宽保持方法中，当通信网络的节点中的活动路径变得不可用时，保持活动路径切换到的备用路径的带宽，每个节点连接到同一目的地，并且该方法包括备份 路径带宽保持阶段，对于保持作为备用路径带宽的L（L为自然数）的M（M为自然数等于或小于L）的信道，用于通知存在于目的地侧的目的地侧节点 要保留的M个信道的标识号信息的备份路径和指示要保持带宽的路径的标识信息是备份路径。

    ATM switch for distributing cells to avoid blocking in the ATM switch
    13.
    发明授权
    ATM switch for distributing cells to avoid blocking in the ATM switch 失效
    ATM交换机用于分配单元以避免ATM交换机中的阻塞

    公开(公告)号：US07339935B2

    公开(公告)日：2008-03-04

    申请号：US10971676

    申请日：2004-10-22

    申请人： Seisho Yasukawa ,  Naoki Takaya ,  Masayoshi Nabeshima ,  Eiji Oki ,  Naoaki Yamanaka

    发明人： Seisho Yasukawa ,  Naoki Takaya ,  Masayoshi Nabeshima ,  Eiji Oki ,  Naoaki Yamanaka

    IPC分类号： H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/1553 ,  H04L2012/565 ,  H04L2012/5652 ,  H04L2012/568 ,  H04L2012/5681 ,  H04Q11/0478

    摘要： An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.

    摘要翻译： ATM开关包括第一级，第二级和第三级，其中每级包括至少一个基本开关，其中第一级，第二级和第三级被连接。 基本开关包括一部分，其指的是写入输入单元的标题中的时间信息，并以时间信息的升序将单元切换到输出端口。 另外，ATM交换机包括在第一级的基本交换机中的小区分配部分。 小区分配部分确定要转移的小区的路由，使得ATM交换机内的路由负载平衡。 ATM交换机还包括添加部分，其将到达时间信息添加到到达的小区作为时间信息。

    ATM switch
    14.
    发明授权
    ATM switch 失效
    ATM交换机

    公开(公告)号：US07136391B1

    公开(公告)日：2006-11-14

    申请号：US09376904

    申请日：1999-08-18

    申请人： Seisho Yasukawa ,  Naoki Takaya ,  Masayoshi Nabeshima ,  Eiji Oki ,  Naoaki Yamanaka

    发明人： Seisho Yasukawa ,  Naoki Takaya ,  Masayoshi Nabeshima ,  Eiji Oki ,  Naoaki Yamanaka

    IPC分类号： H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/1553 ,  H04L2012/565 ,  H04L2012/5652 ,  H04L2012/568 ,  H04L2012/5681 ,  H04Q11/0478

    摘要： An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.

    摘要翻译： ATM开关包括第一级，第二级和第三级，其中每级包括至少一个基本开关，其中第一级，第二级和第三级被连接。 基本开关包括一部分，其指的是写入输入单元的标题中的时间信息，并以时间信息的升序将单元切换到输出端口。 另外，ATM交换机包括在第一级的基本交换机中的小区分配部分。 小区分配部分确定要转移的小区的路由，使得ATM交换机内的路由负载平衡。 ATM交换机还包括添加部分，其将到达时间信息添加到到达的小区作为时间信息。

    Contention control circuit
    15.
    发明授权
    Contention control circuit 失效
    竞争控制电路

    公开(公告)号：US5953341A

    公开(公告)日：1999-09-14

    申请号：US936667

    申请日：1997-09-24

    申请人： Naoaki Yamanaka ,  Eiji Oki ,  Tomoaki Kawamura ,  Tsuneo Matsumura

    发明人： Naoaki Yamanaka ,  Eiji Oki ,  Tomoaki Kawamura ,  Tsuneo Matsumura

    IPC分类号： H04L12/54 ,  H04L12/70 ,  H04Q11/04 ,  H04L12/28 ,  H04L12/56

    CPC分类号： H04L12/5602 ,  H04Q11/0478 ,  H04L2012/5647 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5679

    摘要： A contention control circuit which temporarily stores cells arriving from a respective plurality of input lines to output cells to a single output line without collisions. The contention control circuit compares, at each input line in turn, the priority of the cell that has arrived from that input line, with the priority of the cell selected from among the cells that have arrived from preceding input lines as the cell having the highest priority, and again selects the cell with the higher priority.

    摘要翻译： 一种竞争控制电路，临时存储从相应的多个输入线到达的信元，以将单元输出到单个输出线而没有冲突。 竞争控制电路在每个输入线依次比较从该输入线路到达的小区的优先级，从从先前输入线路到达的小区中选择的小区的优先级比较为具有最高的小区 优先级，再次选择优先级更高的单元。

    Communication network design method and communication equipment
    18.
    发明授权
    Communication network design method and communication equipment 失效
    通信网络设计方法和通信设备

    公开(公告)号：US5812532A

    公开(公告)日：1998-09-22

    申请号：US521981

    申请日：1995-08-31

    申请人： Eiji Oki ,  Naoaki Yamanaka

    发明人： Eiji Oki ,  Naoaki Yamanaka

    IPC分类号： H04L12/70 ,  H04L12/715 ,  H04L12/751 ,  H04Q11/04 ,  H04L12/46 ,  H04L12/56

    CPC分类号： H04L45/04 ,  H04L45/10 ,  H04Q11/0478 ,  H04L2012/5619 ,  H04L2012/5638

    摘要： In order to establish virtual channel networks on an ATM network, a different virtual channel handler interconnection network for each media or service consisting of information to be transferred is established on a virtual path network; and virtual channel networks corresponding to these media or services are formed by the respective virtual channel handler interconnection networks, whereby a plurality of independent virtual channel networks for different media or services are established simultaneously on a single physical network.

    摘要翻译： 为了在ATM网络上建立虚拟信道网络，在虚拟路径网络上建立由用于要传输的信息组成的每个媒体或服务的不同的虚拟信道处理器互连网络; 并且由相应的虚拟信道处理器互连网络形成与这些媒体或服务相对应的虚拟信道网络，由此在单个物理网络上同时建立用于不同媒体或服务的多个独立虚拟信道网络。

    Data communication routing method and device
    19.
    发明授权
    Data communication routing method and device 失效
    数据通信路由方式和设备

    公开(公告)号：US5577030A

    公开(公告)日：1996-11-19

    申请号：US521986

    申请日：1995-08-31

    申请人： Eiji Oki ,  Naoaki Yamanaka

    发明人： Eiji Oki ,  Naoaki Yamanaka

    IPC分类号： H04L12/56 ,  H04L12/44

    CPC分类号： H04L45/00 ,  H04L45/122

    摘要： A device and method for designing a reliable communication network using disjoint paths with no shared links or nodes. An adjacency matrix is copied to a temporary adjacency matrix, and when it has been confirmed by matrix calculation that there is a path or paths between the origin and destination nodes, a path is obtained backwards and links in the path are deleted. The search for a path is repeated using the resulting temporary adjacency matrix. In this way, the actual number of disjoint paths is never overestimated. Rapid calculation is possible by means of a super-computer.

    摘要翻译： 一种使用不具有共享链路或节点的不相交路径来设计可靠通信网络的设备和方法。 邻接矩阵被复制到临时邻接矩阵，并且当通过矩阵计算已经确认在源节点和目的节点之间存在路径或路径时，向后获得路径并且路径中的链路被删除。 使用产生的临时邻接矩阵重复搜索路径。 以这种方式，实际的不相交路径数量从未被过高估计。 通过超级计算机可以快速计算。

    Layered network node, network incorporating the same, node, and layered network
    20.
    发明授权
    Layered network node, network incorporating the same, node, and layered network 失效
    分层网络节点，包含相同，节点和分层网络的网络

    公开(公告)号：US07545829B2

    公开(公告)日：2009-06-09

    申请号：US10678298

    申请日：2003-10-03

    申请人： Daisaku Shimazaki ,  Eiji Oki ,  Naoaki Yamanaka

    发明人： Daisaku Shimazaki ,  Eiji Oki ,  Naoaki Yamanaka

    IPC分类号： H04J140/00

    CPC分类号： H04L47/825 ,  H04L41/00 ,  H04L43/0811 ,  H04L45/02 ,  H04L45/04 ,  H04L45/34 ,  H04L45/50 ,  H04L45/62 ,  H04L45/64 ,  H04L47/745 ,  H04L47/822

    摘要： A layered network node of which a network it belongs is divided up into cells which are constituted by a plurality of nodes; the cells are defined as virtual nodes; if links exist which connect the interiors of the virtual nodes and the exterior, contact points between them are defined as interfaces of the virtual nodes; the virtual network constituted by the virtual nodes is further divided up into cells and making them into virtual nodes; said virtual network is defined as a network of a higher level with respect to the initial virtual network; by performing said operation of division into cells and making into virtual nodes once or a plurality of times, the layered network is constituted; path computation is performed from the source node to a destination node in a stepwise manner by dispersing it over the various layers.

    摘要翻译： 将其所属的网络的分层网络节点划分为由多个节点构成的小区; 单元被定义为虚拟节点; 如果存在连接虚拟节点和外部内部的链接，则它们之间的接触点被定义为虚拟节点的接口; 由虚拟节点构成的虚拟网络进一步划分为小区，使其成为虚拟节点; 所述虚拟网络被定义为相对于初始虚拟网络的更高级别的网络; 通过执行划分为小区的操作并使其成为虚拟节点一次或多次，构成分层网络; 通过将其分散在各个层上，以逐步方式从源节点到目的地节点执行路径计算。