Codec to reduce simultaneously switching outputs
    11.
    发明授权
    Codec to reduce simultaneously switching outputs 有权
    编解码器同时减少切换输出

    公开(公告)号:US09406364B2

    公开(公告)日:2016-08-02

    申请号:US14310269

    申请日:2014-06-20

    CPC classification number: G11C8/10 G06F11/1048 G11C7/1006 G11C8/06

    Abstract: Embodiments of an apparatus and method for encoding data are disclosed that may allow for reduced simultaneous switching output noise. The apparatus may include a row decode circuit, a column decode circuit, and a memory array. The row decode circuit and column decode circuits may be configured to decode a first portion and a second portion, respectively, of a given data word of a first plurality of data words, where each data word may include N data bits, and where N is an integer greater than one. The memory array may be configured to store a second plurality of data words where each data word may include M data bits, and where M is an integer greater than N. The memory array may be further configured to retrieve a given data word of the second plurality of data words dependent upon the decoded first and second portions.

    Abstract translation: 公开了一种用于编码数据的装置和方法的实施例,其可以允许降低的同时开关输出噪声。 该装置可以包括行解码电路,列解码电路和存储器阵列。 行解码电路和列解码电路可以被配置为分别解码第一多个数据字的给定数据字的第一部分和第二部分,其中每个数据字可以包括N个数据位,并且其中N是 大于1的整数。 存储器阵列可以被配置为存储第二多个数据字,其中每个数据字可以包括M个数据位,并且其中M是大于N的整数。存储器阵列还可以被配置为检索第二个数据字的给定数据字 取决于解码的第一和第二部分的多个数据字。

    Memory Corruption Detection Support For Distributed Shared Memory Applications
    12.
    发明申请
    Memory Corruption Detection Support For Distributed Shared Memory Applications 有权
    内存损坏检测支持分布式共享内存应用程序

    公开(公告)号:US20150278103A1

    公开(公告)日:2015-10-01

    申请号:US14530354

    申请日:2014-10-31

    Abstract: Nodes in a distributed node system are configured to support memory corruption detection when memory is shared between the nodes. Nodes in the distributed node system share data in units of memory referred to herein as “shared cache lines.” A node associates a version value with data in a shared cache line. The version value and data may be stored in a shared cache line in the node's main memory. When the node performs a memory operation, it can use the version value to determine whether memory corruption has occurred. For example, a pointer may be associated with a version value. When the pointer is used to access memory, the version value of the pointer may indicate the expected version value at the memory location. If the version values do not match, then memory corruption has occurred.

    Abstract translation: 分布式节点系统中的节点被配置为在节点之间共享存储器时支持内存损坏检测。 分布式节点系统中的节点以这里称为“共享高速缓存行”的存储器单元共享数据。节点将版本值与共享高速缓存行中的数据相关联。 版本值和数据可以存储在节点的主存储器中的共享高速缓存行中。 当节点执行内存操作时,它可以使用版本值来确定是否发生内存损坏。 例如,指针可能与版本值相关联。 当指针用于访问存储器时,指针的版本值可以指示存储器位置处的期望版本值。 如果版本值不匹配,则会发生内存损坏。

    Observation of data in persistent memory
    15.
    发明授权
    Observation of data in persistent memory 有权
    观察持久记忆中的数据

    公开(公告)号:US09367472B2

    公开(公告)日:2016-06-14

    申请号:US13914001

    申请日:2013-06-10

    Abstract: Systems and methods for reliably using data storage media. Multiple processors are configured to access a persistent memory. For a given data block corresponding to a write access request from a first processor to the persistent memory, a cache controller prevents any read access of a copy of the given data block in an associated cache. The cache controller prevents any read access while detecting an acknowledgment that the given data block is stored in the persistent memory is not yet received. Until the acknowledgment is received, the cache controller allows write access of the copy of the given data block in the associated cache only for a thread in the first processor that originally sent the write access request. The cache controller invalidates any copy of the given data block in any cache levels below the associated cache.

    Abstract translation: 可靠地使用数据存储介质的系统和方法。 多个处理器被配置为访问持久存储器。 对于对应于从第一处理器到持久存储器的写访问请求的给定数据块,高速缓存控制器防止在相关联的高速缓存中的给定数据块的副本的任何读访问。 高速缓存控制器在检测到尚未接收到持久存储器中存储给定数据块的确认时防止任何读访问。 在接收到确认之前,高速缓存控制器允许仅对最初发送写访问请求的第一处理器中的线程对相关联的高速缓存中的给定数据块的副本进行写访问。 高速缓存控制器使相关高速缓存下的任何缓存级别的给定数据块的任何副本无效。

    MULTIPLE ON-DIE COMMUNICATION NETWORKS
    16.
    发明申请
    MULTIPLE ON-DIE COMMUNICATION NETWORKS 审中-公开
    多功能通讯网络

    公开(公告)号:US20150281396A1

    公开(公告)日:2015-10-01

    申请号:US14336037

    申请日:2014-07-21

    CPC classification number: H04L67/32 H04L67/2842

    Abstract: A method for communication among multiple on-die functional blocks using multiple communication networks is disclosed. The method may include sending a request from a first functional block via a first network. In response to receiving the request, a second functional block may respond to the first functional block via a second network. The second functional block may also send any requested data to the first functional block via a third network.

    Abstract translation: 公开了一种使用多个通信网络在多个片上功能块之间进行通信的方法。 该方法可以包括经由第一网络从第一功能块发送请求。 响应于接收到请求,第二功能块可以经由第二网络对第一功能块进行响应。 第二功能块还可以经由第三网络向第一功能块发送任何请求的数据。

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