公开(公告)号：US09865591B2

公开(公告)日：2018-01-09

申请号：US15342023

申请日：2016-11-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Nobuyuki Horikawa ,  Osamu Kusumoto ,  Masashi Hayashi ,  Masao Uchida

IPC: H01L29/15 ,  H01L27/06 ,  H01L29/78 ,  H01L27/04 ,  H01L29/861 ,  H01L29/868 ,  H01L29/06 ,  H01L29/12 ,  H01L29/16 ,  H01L29/41

CPC classification number: H01L27/0605 ,  H01L27/04 ,  H01L27/0727 ,  H01L29/06 ,  H01L29/0623 ,  H01L29/12 ,  H01L29/1608 ,  H01L29/41 ,  H01L29/78 ,  H01L29/861 ,  H01L29/8611 ,  H01L29/868

Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.

公开(公告)号：US10658466B2

公开(公告)日：2020-05-19

申请号：US16260721

申请日：2019-01-29

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masao Uchida

IPC: H01L29/16 ,  H01L29/06 ,  H01L29/24 ,  H01L29/08 ,  H01L29/66 ,  H01L29/872

Abstract: A semiconductor element includes: a semiconductor substrate of a first conduction type; a silicon carbide semiconductor layer of the first conduction type disposed above a principal surface of the semiconductor substrate; a terminal edge region of a second conduction type disposed in the silicon carbide semiconductor layer; an insulating film; a first electrode disposed on the silicon carbide semiconductor layer; and a seal ring surrounding the first electrode. The terminal edge region is disposed to surround part of a surface of the silicon carbide semiconductor layer when viewed in a normal direction of the principal surface of the semiconductor substrate. The terminal edge region includes a guard ring region of the second conduction type, and a terminal edge injection region of the second conduction type. The seal ring is formed on the terminal edge injection region through an opening disposed on the insulating film.

公开(公告)号：US09577044B2

公开(公告)日：2017-02-21

申请号：US14632895

申请日：2015-02-26

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masao Uchida ,  Masashi Hayashi ,  Koutarou Tanaka

IPC: H01L29/15 ,  H01L29/16 ,  H01L29/66 ,  H01L29/872 ,  H01L29/47 ,  H01L21/04 ,  H01L29/06 ,  H01L29/78 ,  H01L29/45 ,  H01L29/423

CPC classification number: H01L29/1608 ,  H01L21/0485 ,  H01L21/0495 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/423 ,  H01L29/45 ,  H01L29/47 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7828 ,  H01L29/872

Abstract: A semiconductor device includes first and second second-conductivity-type region groups containing multiple second-conductivity-type regions that are disposed on a first silicon carbide semiconductor layer of a first conductivity type, arrayed in parallel following one direction with a space between each other, and first and second electrodes disposed on the first silicon carbide semiconductor layer and forming a Schottky junction with the first silicon carbide semiconductor layer. The first electrode covers a position where a distance from adjacent first and second second-conductivity-type regions included in a first second-conductivity-type region group, and a distance from a third second-conductivity-type region included in a second second-conductivity-type region group and adjacent to the first and second second-conductivity-type regions, are equal. A Schottky barrier between the first electrode and the first silicon carbide semiconductor layer is larger than a Schottky barrier between the second electrode and the first silicon carbide semiconductor layer.

Abstract translation: 半导体器件包括第一和第二第二导电型区域组，其包含多个第二导电类型区域，所述第二导电类型区域设置在第一导电类型的第一碳化硅半导体层上，并排沿着一个方向并排放置 以及设置在第一碳化硅半导体层上并与第一碳化硅半导体层形成肖特基结的第一和第二电极。 第一电极覆盖从包括在第一第二导电类型区域组中的相邻第一和第二第二导电类型区域到与包括在第二第二导电类型区域组中的第三第二导电类型区域的距离的位置， 导电类型区域组并且与第一和第二第二导电类型区域相邻。 第一电极和第一碳化硅半导体层之间的肖特基势垒大于第二电极和第一碳化硅半导体层之间的肖特基势垒。

公开(公告)号：US20150206967A1

公开(公告)日：2015-07-23

申请号：US14413203

申请日：2014-02-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masashi Hayashi ,  Masao Uchida

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/06 ,  H01L29/16 ,  H01L27/02

CPC classification number: H01L29/7815 ,  H01L27/0255 ,  H01L27/0296 ,  H01L27/0727 ,  H01L29/06 ,  H01L29/0607 ,  H01L29/0619 ,  H01L29/12 ,  H01L29/1608 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7828

Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a silicon carbide layer, a switching element section, and an overvoltage detection element section whose area is smaller than that of the switching element section. The switching element section includes a first electrode pad, a first terminal section surrounding the first electrode pad and provided in the silicon carbide layer, and a first insulating film covering the first terminal section. The overvoltage detection element section includes a second electrode pad, a second terminal section surrounding the second electrode pad and provided in the silicon carbide layer, and a second insulating film covering the second terminal section and being in contact with the silicon carbide layer. A breakdown field strength of at least part of a portion of the second insulating film being in contact with the silicon carbide layer is lower than that of the first insulating film.

Abstract translation: 半导体器件包括碳化硅半导体衬底，碳化硅层，开关元件部分和面积小于开关元件部分的面积的过电压检测元件部分。 开关元件部分包括第一电极焊盘，围绕第一电极焊盘并设置在碳化硅层中的第一端子部分和覆盖第一端子部分的第一绝缘膜。 过电压检测元件部分包括第二电极焊盘，围绕第二电极焊盘并设置在碳化硅层中的第二端子部分和覆盖第二端子部分并与碳化硅层接触的第二绝缘膜。 第二绝缘膜的与碳化硅层接触的部分的至少一部分的击穿场强低于第一绝缘膜的击穿场强。

公开(公告)号：US11024706B2

公开(公告)日：2021-06-01

申请号：US16726982

申请日：2019-12-26

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masao Uchida ,  Kouichi Saitou ,  Takashi Hasegawa

IPC: H01L29/06 ,  H01L29/47 ,  H01L29/16

Abstract: A semiconductor device includes a silicon carbide semiconductor layer, a termination region disposed in the silicon carbide semiconductor layer, an insulating film covering part of the termination region, an electrode disposed on the silicon carbide semiconductor layer, a seal ring disposed on remaining part of the termination region and surrounding the electrode, and a passivation film covering the insulating film and the seal ring. Assuming that an outer peripheral end of the seal ring and an outer peripheral end of the passivation film have distance L2 at a side of the silicon carbide semiconductor layer, the outer peripheral end of the seal ring and the outer peripheral end of the passivation film have distance L1 at a corner, and the outer peripheral end of the passivation film at the corner has radius of curvature R1, L1>L2 and R1≥L2 are satisfied.

公开(公告)号：US10672878B2

公开(公告)日：2020-06-02

申请号：US16255875

申请日：2019-01-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Ohoka ,  Nobuyuki Horikawa ,  Masao Uchida

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L29/417 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L29/16

Abstract: The silicon carbide semiconductor device includes a plurality of unit cells each having an MISFET structure and provided on a silicon carbide semiconductor substrate. A gate upper electrode disposed adjacent to the plurality of unit cells includes a gate pad and gate global wires. When viewed in plan, gate electrodes do not overlap with the gate pad.

公开(公告)号：US09773924B2

公开(公告)日：2017-09-26

申请号：US15089542

申请日：2016-04-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masao Uchida ,  Kouichi Saitou ,  Takayuki Wakayama

IPC: H01L29/872 ,  H01L29/16 ,  H01L29/04 ,  H01L29/66 ,  H01L29/06 ,  H01L29/36 ,  H01L29/40

CPC classification number: H01L29/872 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/402 ,  H01L29/6606

Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface, barrier regions having a second conductivity type and disposed within the silicon carbide semiconductor layer, an edge termination region having the second conductivity type and disposed within the silicon carbide semiconductor layer, the edge termination region enclosing the barrier regions, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface, wherein each of the barrier regions has a polygonal boundary with the silicon carbide semiconductor layer, and each of sides of the polygonal boundary has an angle of 0° to 5° inclusive relative to direction of crystal orientations of the semiconductor substrate.

公开(公告)号：US09543858B2

公开(公告)日：2017-01-10

申请号：US14440341

申请日：2014-07-04

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Osamu Kusumoto ,  Hideki Nakata ,  Keiji Akamatsu ,  Masao Uchida

IPC: H01L27/02 ,  H01L27/112 ,  H01L29/74 ,  H01L29/06 ,  H02M7/5387 ,  H01L21/76 ,  H02M1/08 ,  H02M1/32 ,  H02M7/00 ,  H02M7/797 ,  H01L21/82 ,  H01L29/10 ,  H01L29/16 ,  H01L29/78 ,  H02M1/00

CPC classification number: H02M7/5387 ,  H01L21/76 ,  H01L21/8213 ,  H01L29/0642 ,  H01L29/0646 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/7802 ,  H01L29/7815 ,  H01L29/7827 ,  H01L29/7828 ,  H02M1/08 ,  H02M1/32 ,  H02M7/003 ,  H02M7/797 ,  H02M2001/0009

Abstract: A semiconductor device includes a gate pad, a first source pad and a second source pad insulated from each other, a drain pad, a main region, and a sense region for detecting a forward current and a reverse current. The main region and the sense region each include a plurality of unit cells which are in parallel connection, the number of unit cells in the sense region being smaller than the number of unit cells in the main region. A source electrode of any unit cell in the main region is connected to the first source pad, and a source electrode of any unit cell in the sense region is connected to the second source pad.

Abstract translation: 半导体器件包括彼此绝缘的栅极焊盘，第一源极焊盘和第二源极焊盘，漏极焊盘，主要区域和用于检测正向电流和反向电流的感测区域。 主区域和感测区域各自包括并联连接的多个单位单元，感测区域中的单位单元的数量小于主区域中的单位单元的数量。 主区域中的任何单电池的源电极连接到第一源极焊盘，并且感测区域中的任何单电池的源电极连接到第二源极焊盘。

公开(公告)号：US09214546B2

公开(公告)日：2015-12-15

申请号：US14413203

申请日：2014-02-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masashi Hayashi ,  Masao Uchida

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/06 ,  H01L29/12 ,  H01L27/02 ,  H01L27/07 ,  H01L29/16

CPC classification number: H01L29/7815 ,  H01L27/0255 ,  H01L27/0296 ,  H01L27/0727 ,  H01L29/06 ,  H01L29/0607 ,  H01L29/0619 ,  H01L29/12 ,  H01L29/1608 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7828

Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a silicon carbide layer, a switching element section, and an overvoltage detection element section whose area is smaller than that of the switching element section. The switching element section includes a first electrode pad, a first terminal section surrounding the first electrode pad and provided in the silicon carbide layer, and a first insulating film covering the first terminal section. The overvoltage detection element section includes a second electrode pad, a second terminal section surrounding the second electrode pad and provided in the silicon carbide layer, and a second insulating film covering the second terminal section and being in contact with the silicon carbide layer. A breakdown field strength of at least part of a portion of the second insulating film being in contact with the silicon carbide layer is lower than that of the first insulating film.

Abstract translation: 半导体器件包括碳化硅半导体衬底，碳化硅层，开关元件部分和面积小于开关元件部分的面积的过电压检测元件部分。 开关元件部分包括第一电极焊盘，围绕第一电极焊盘并设置在碳化硅层中的第一端子部分和覆盖第一端子部分的第一绝缘膜。 过电压检测元件部分包括第二电极焊盘，围绕第二电极焊盘并设置在碳化硅层中的第二端子部分和覆盖第二端子部分并与碳化硅层接触的第二绝缘膜。 第二绝缘膜的与碳化硅层接触的部分的至少一部分的击穿场强低于第一绝缘膜的击穿场强。