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公开(公告)号:USRE49195E1
公开(公告)日:2022-08-30
申请号:US16294567
申请日:2019-03-06
Inventor: Nobuyuki Horikawa , Osamu Kusumoto , Masashi Hayashi , Masao Uchida
IPC: H01L27/04 , H01L29/06 , H01L29/78 , H01L29/861 , H01L29/868 , H01L29/12 , H01L29/16 , H01L29/41 , H01L27/06 , H01L27/07 , H01L29/66 , H01L29/423 , H01L29/739
Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.
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公开(公告)号:US09985128B2
公开(公告)日:2018-05-29
申请号:US15667895
申请日:2017-08-03
Inventor: Atsushi Ohoka , Osamu Kusumoto
IPC: H01L29/06 , H01L29/78 , H01L29/417 , H01L29/10 , H01L29/08 , H01L29/26 , H01L29/16 , H01L29/66 , H01L21/02 , H01L21/04 , H01L29/167 , H01L21/8234 , H01L27/085
CPC classification number: H01L29/7815 , H01L21/02378 , H01L21/0243 , H01L21/02433 , H01L21/02529 , H01L21/02634 , H01L21/046 , H01L21/0465 , H01L21/823481 , H01L27/085 , H01L29/0619 , H01L29/0646 , H01L29/0684 , H01L29/0696 , H01L29/0865 , H01L29/1095 , H01L29/1608 , H01L29/167 , H01L29/26 , H01L29/41741 , H01L29/66068 , H01L29/66712 , H01L29/7811
Abstract: A semiconductor device including a main region, a sense region, a separation region electrically isolating the main and sense region regions includes a first semiconductor layer positioned on the main surface of a semiconductor substrate, a plurality of main cells disposed in the main region, and a plurality of sense cells disposed in the sense region. Source regions of the main cell become conductive with a source electrode and source regions of the sense cell become conductive with a sense electrode. The separation region includes a plurality of second conductivity type separation body regions and a barrier region and is disposed within a first semiconductor layer and is disposed to abut on the surface of the first semiconductor layer.
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公开(公告)号:US09923090B2
公开(公告)日:2018-03-20
申请号:US15403381
申请日:2017-01-11
Inventor: Atsushi Ohoka , Masao Uchida , Nobuyuki Horikawa , Osamu Kusumoto
CPC classification number: H01L29/7803 , H01L21/28 , H01L27/0617 , H01L29/0696 , H01L29/105 , H01L29/1095 , H01L29/1608 , H01L29/42368 , H01L29/66068 , H01L29/7828 , H01L29/80
Abstract: In the silicon carbide semiconductor element, a second silicon carbide semiconductor layer that is in contact with the surface of a first silicon carbide semiconductor layer has at least an upper layer including a dopant of a first conductivity type at a high concentration. Above a junction field effect transistor (JFET) region interposed between body regions that are disposed in the first silicon carbide semiconductor layer so as to be spaced from each other, the silicon carbide semiconductor element has a channel removed region, which is a cutout formed by removing a high concentration layer from the front surface side of the second silicon carbide semiconductor layer, the high concentration layer having a higher dopant concentration than at least the dopant concentration of the JFET region. The width of the channel removed region is smaller than that of the JFET region.
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公开(公告)号:US09252211B2
公开(公告)日:2016-02-02
申请号:US14714226
申请日:2015-05-15
Inventor: Masao Uchida , Osamu Kusumoto , Nobuyuki Horikawa
IPC: H01L29/15 , H01L29/745 , H01L21/00 , H01L21/338 , H01L29/06 , H01L27/06 , H01L29/872
CPC classification number: H01L29/0619 , H01L21/8213 , H01L27/0207 , H01L27/0605 , H01L27/0727 , H01L29/1608 , H01L29/36 , H01L29/66068 , H01L29/7806 , H01L29/7811 , H01L29/872
Abstract: A semiconductor device includes a first silicon carbide semiconductor layer of a first conductive type that is positioned on a front surface of a substrate of the first conductive type, a transistor region that includes transistor cells, a Schottky region, and a boundary region. The boundary region includes a second body region and a gate connector that is arranged on the second body region via an insulating film and electrically connected with a gate electrode. The Schottky region includes a Schottky electrode that is arranged on the first silicon carbide semiconductor layer.
Abstract translation: 半导体器件包括位于第一导电类型的衬底的前表面上的第一导电类型的第一碳化硅半导体层,包括晶体管单元,肖特基区域和边界区域的晶体管区域。 边界区域包括第二体区域和栅极连接器,其经由绝缘膜布置在第二体区上并与栅电极电连接。 肖特基区域包括布置在第一碳化硅半导体层上的肖特基电极。
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公开(公告)号:US09865591B2
公开(公告)日:2018-01-09
申请号:US15342023
申请日:2016-11-02
Inventor: Nobuyuki Horikawa , Osamu Kusumoto , Masashi Hayashi , Masao Uchida
IPC: H01L29/15 , H01L27/06 , H01L29/78 , H01L27/04 , H01L29/861 , H01L29/868 , H01L29/06 , H01L29/12 , H01L29/16 , H01L29/41
CPC classification number: H01L27/0605 , H01L27/04 , H01L27/0727 , H01L29/06 , H01L29/0623 , H01L29/12 , H01L29/1608 , H01L29/41 , H01L29/78 , H01L29/861 , H01L29/8611 , H01L29/868
Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.
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公开(公告)号:US09985125B1
公开(公告)日:2018-05-29
申请号:US15812430
申请日:2017-11-14
Inventor: Tsuneichiro Sano , Atsushi Ohoka , Tsutomu Kiyosawa , Osamu Ishiyama , Takayuki Wakayama , Kouichi Saitou , Takashi Hasegawa , Daisuke Shindo , Osamu Kusumoto
IPC: H01L31/0312 , H01L29/78 , H01L29/16 , H01L29/06 , H01L29/423 , H01L23/31 , H01L29/10
CPC classification number: H01L29/7811 , H01L23/3192 , H01L29/0619 , H01L29/1095 , H01L29/1608 , H01L29/42356
Abstract: A silicon carbide semiconductor device includes a first conductivity type silicon carbide substrate having an active region and a termination region surrounding the active region, a plurality of unit cells located in the active region, and a termination structure located in the termination region. Each unit cell is provided with a transistor structure. The termination structure includes the silicon carbide semiconductor layer, a second conductivity type second body region surrounding the active region, one or more second conductivity type rings surrounding the second body region, one or more outer-circumferential upper source electrodes surrounding the active region, and an upper gate electrode. The silicon carbide semiconductor device further includes a first protective film and a second protective film. The first protective film covers the inner-circumferential upper source electrode, the upper gate electrode, and an inner side surface of the one or more outer-circumferential upper source electrodes except for a pad region. The second protective film covers the first protective film and at least a part of the one or more second conductivity type rings.
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公开(公告)号:US09543858B2
公开(公告)日:2017-01-10
申请号:US14440341
申请日:2014-07-04
Inventor: Osamu Kusumoto , Hideki Nakata , Keiji Akamatsu , Masao Uchida
IPC: H01L27/02 , H01L27/112 , H01L29/74 , H01L29/06 , H02M7/5387 , H01L21/76 , H02M1/08 , H02M1/32 , H02M7/00 , H02M7/797 , H01L21/82 , H01L29/10 , H01L29/16 , H01L29/78 , H02M1/00
CPC classification number: H02M7/5387 , H01L21/76 , H01L21/8213 , H01L29/0642 , H01L29/0646 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/7802 , H01L29/7815 , H01L29/7827 , H01L29/7828 , H02M1/08 , H02M1/32 , H02M7/003 , H02M7/797 , H02M2001/0009
Abstract: A semiconductor device includes a gate pad, a first source pad and a second source pad insulated from each other, a drain pad, a main region, and a sense region for detecting a forward current and a reverse current. The main region and the sense region each include a plurality of unit cells which are in parallel connection, the number of unit cells in the sense region being smaller than the number of unit cells in the main region. A source electrode of any unit cell in the main region is connected to the first source pad, and a source electrode of any unit cell in the sense region is connected to the second source pad.
Abstract translation: 半导体器件包括彼此绝缘的栅极焊盘,第一源极焊盘和第二源极焊盘,漏极焊盘,主要区域和用于检测正向电流和反向电流的感测区域。 主区域和感测区域各自包括并联连接的多个单位单元,感测区域中的单位单元的数量小于主区域中的单位单元的数量。 主区域中的任何单电池的源电极连接到第一源极焊盘,并且感测区域中的任何单电池的源电极连接到第二源极焊盘。
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