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公开(公告)号：US06905908B2
公开(公告)日：2005-06-14
申请号：US10329595
申请日：2002-12-26
CPC分类号： H01L51/0516 , H01L51/0024 , H01L51/0036 , H01L51/0051 , H01L51/0078 , H01L51/0084
摘要： Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.
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12.发明申请Semiconductor device and method for providing a reduced surface area electrode 失效用于提供减小的表面积电极的半导体器件和方法公开(公告)号：US20070094624A1
公开(公告)日：2007-04-26
申请号：US11258634
申请日：2005-10-26
申请人： Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Jie Zhang
发明人： Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Jie Zhang
IPC分类号： G06F17/50
CPC分类号： H01L29/41733 , H01L27/1292 , H01L51/0022 , H01L51/055 , H01L51/102 , H01L2924/19043 , H01L2924/30105
摘要： An apparatus (200) such as a semiconductor device comprises a gate electrode (201) and at least a first electrode (202). The first electrode preferably has an established perimeter that at least partially overlaps with respect to the gate electrode to thereby form a corresponding transistor channel. In a preferred approach the first electrode has a surface area that is reduced notwithstanding the aforementioned established perimeter. This, in turn, aids in reducing any corresponding parasitic capacitance. This reduction in surface area may be accomplished, for example, by providing openings (203) through certain portions of the first electrode.
摘要翻译： 诸如半导体器件的装置（200）包括栅电极（201）和至少第一电极（202）。 第一电极优选地具有与栅电极至少部分重叠的确定的周边，从而形成对应的晶体管沟道。 在优选的方法中，尽管具有上述建立的周长，第一电极具有减小的表面积。 这又有助于减少任何相应的寄生电容。 表面积的这种减小可以例如通过提供通过第一电极的某些部分的开口（203）来实现。
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公开(公告)号：US06870181B2
公开(公告)日：2005-03-22
申请号：US10187516
申请日：2002-07-02
申请人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
发明人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
CPC分类号： H01L51/0545 , H01L51/0021
摘要： An organic field effect transistor utilizes a bifunctional contact-enhancing agent at various interfaces to improve carrier mobility through the organic semiconductor layer, to improve carrier injection, and to enhance adhesion via a bifunctional mechanism. The contact-enhancing agent can be situated between the gate electrode (2) and the dielectric layer (3) to form a chemical or physical bond between the gate electrode and the dielectric layer. It can also be situated between the dielectric layer and the organic semiconducting layer (4), or between the source and drain electrodes (5, 6) and the organic semiconducting layer.
摘要翻译： 有机场效应晶体管在各种界面处利用双功能接触增强剂来改善载流子迁移率通过有机半导体层，改善载流子注入，并通过双功能机制增强粘附力。 接触增强剂可以位于栅极（2）和电介质层（3）之间，以在栅电极和电介质层之间形成化学或物理结合。 它也可以位于介电层和有机半导体层（4）之间，或位于源极和漏极（5,6）和有机半导体层之间。
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14.发明申请公开(公告)号：US20070089540A1
公开(公告)日：2007-04-26
申请号：US11258747
申请日：2005-10-26
IPC分类号： G01N1/00
CPC分类号： H01L22/14 , H01L51/0005
摘要： A printing platform receives (102) (preferably in-line with a semiconductor device printing process (101)) a substrate having at least one semiconductor device printed thereon and further having a test structure printed thereon, which test structure comprises at least one printed semiconductor layer. These teachings then provide for the automatic testing (103) of the test structure with respect to at least one static (i.e., relatively unchanging) electrical characteristic metric. The static electrical characteristic metric (or metrics) of choice will likely vary with the application setting but can include, for example, a measure of electrical resistance, a measure of electrical reactance, and/or a measure of electrical continuity. Optionally (though preferably) the semiconductor device printing process itself is then adjusted (105) as a function, at least in part, of this metric.
摘要翻译： 印刷平台接收（优选地与半导体器件印刷工艺（101）成直角））具有印刷在其上的至少一个半导体器件并且还具有印刷在其上的测试结构的衬底，该测试结构包括至少一个印刷半导体 层。 然后，这些教导提供了关于至少一个静态（即，相对不变的）电特性度量的测试结构的自动测试（103）。 选择的静态电特性度量（或度量）可能随着应用设置而变化，但是可以包括例如电阻的测量，电抗的测量和/或电连续性的测量。 可选地（尽管优选地），然后至少部分地基于该度量来调整（105）半导体器件打印过程本身。
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15.发明申请Method and apparatus to facilitate printing of an electrically functional component 审中-公开便于打印电功能部件的方法和装置公开(公告)号：US20060131545A1
公开(公告)日：2006-06-22
申请号：US11013872
申请日：2004-12-16
IPC分类号： H01B1/12
CPC分类号： H01B1/22 , H01L51/0005 , H05K1/0269 , H05K1/097 , H05K1/16 , H05K2203/161
摘要： The density (and hence thickness) of a functional ink layer (41) as comprises a part of an active printed electronic component (71) is determined through interaction (13) of the functional ink with light. This information, in turn, facilitates assessment (14) of the likely corresponding electrical performance of the electronic component. When the functional ink comprises a transparent material, a dye can be added to facilitate the desired interaction and assessment.
摘要翻译： 通过功能油墨与光的相互作用（13）确定包括活性印刷电子部件（71）的一部分的功能油墨层（41）的密度（因此厚度）。 这些信息又有助于评估（14）电子部件可能相应的电气性能。 当功能油墨包含透明材料时，可以添加染料以促进所需的相互作用和评估。
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公开(公告)号：US20050176196A1
公开(公告)日：2005-08-11
申请号：US11102166
申请日：2005-04-08
IPC分类号： H01L51/00 , H01L51/30 , H01L51/40 , H01L21/00 , H01L21/8234
CPC分类号： H01L51/0516 , H01L51/0024 , H01L51/0036 , H01L51/0051 , H01L51/0078 , H01L51/0084
摘要： Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.
摘要翻译： 有机场效应晶体管（OFET）可以通过使用在介质芯的每一侧上具有导电层（204,206）的多层膜（202）在有机膜上快速且低成本地产生。 图案化导电层以形成栅电极（214），并且使用热和压力（225）或粘合剂层（228）将聚合物膜（223）附着到多层电介质膜的栅电极侧。 然后在多层电介质膜的剩余侧上形成源电极和漏电极（236），并且在源电极和漏电极上沉积有机半导体（247），以填充源极和漏极之间的间隙 电极并且接触电介质膜的一部分以产生有机场效应晶体管。
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17.发明授权Integrated circuit including field effect transistor and method of manufacture 失效集成电路包括场效应晶体管及其制造方法公开(公告)号：US06661024B1
公开(公告)日：2003-12-09
申请号：US10187737
申请日：2002-07-02
申请人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
发明人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
IPC分类号： H01L3524
CPC分类号： H01L51/0516 , B82Y10/00 , H01L27/283 , H01L51/0024 , H01L51/0036 , H01L51/0038 , H01L51/0046 , H01L51/0052 , H01L51/0053 , H01L51/0078 , H01L51/0097 , H01L51/0512 , H01L51/0541 , H01L51/0545
摘要： An integrated circuit (100, 200, 300, 400) that includes a field effect transistor (102, 202, 302, 402) is fabricated by forming an organic semiconductor channel (112, 216, 308, 418) on one substrate (106, 204), forming device electrodes (114, 116, 110, 208, 210, 212) on one or more other substrates (104, 108, 206), and subsequently laminating the substrates together. In one embodiment, a dielectric patch (214) that functions as a gate dielectric is formed on one of the substrates (204, 206) prior to performing the lamination. Lamination provides a low cost route to device assembly, allows for separate fabrication of different device structures on different substrates, and thins various device layers resulting in improved performance.
摘要翻译： 包括场效应晶体管（102,202,302,402）的集成电路（100,200,300,400）通过在一个衬底上形成有机半导体沟道（112,216,308,418）来制造， 204），在一个或多个其它衬底（104,108,206）上形成器件电极（114,116,110,208,210,212），然后将衬底层叠在一起。 在一个实施例中，在执行层压之前，在一个基板（204,206）上形成用作栅极电介质的电介质贴片（214）。 层压为器件组装提供了低成本的途径，允许在不同衬底上单独制造不同的器件结构，并且使各种器件层产生改善的性能。
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公开(公告)号：US20050041453A1
公开(公告)日：2005-02-24
申请号：US10646231
申请日：2003-08-22
申请人： Paul Brazis , Thomas Tirpak , Kin Tsui , Krishna Kalyanasundaram , Daniel Gamota
发明人： Paul Brazis , Thomas Tirpak , Kin Tsui , Krishna Kalyanasundaram , Daniel Gamota
CPC分类号： G11C8/12 , G06F3/061 , G06F3/0616 , G06F3/0625 , G06F3/064 , G06F3/0679 , G11C7/1006 , Y02D10/154
摘要： A method and apparatus for writing to solid-state memory is provided herein. In particular, a controller is provided that monitors operating parameters of each die within the system. In order to enable fast, real-time write operations, feedback from each die is analyzed and compared with a stored set of operating parameters. Based on this comparison, a particular die is chosen for write operations such that system performance is optimized.
摘要翻译： 本文提供了一种写入固态存储器的方法和装置。 特别地，提供了一种监控系统内每个管芯的运行参数的控制器。 为了实现快速，实时的写入操作，分析来自每个管芯的反馈并将其与存储的一组操作参数进行比较。 基于该比较，选择特定的管芯用于写入操作，从而优化系统性能。
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公开(公告)号：US06780733B2
公开(公告)日：2004-08-24
申请号：US10236619
申请日：2002-09-06
IPC分类号： H01L21301
CPC分类号： H01L21/6836 , H01L21/78 , H01L23/5387 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2221/68327 , H01L2224/05599 , H01L2224/32145 , H01L2224/45099 , H01L2224/48091 , H01L2224/8319 , H01L2224/8385 , H01L2224/85399 , H01L2924/00014 , H01L2924/01006 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01049 , H01L2924/01058 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2224/45015 , H01L2924/207
摘要： A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.
摘要翻译： 其中形成有集成电路元件的晶片（10）变薄，并且第一载体（41）粘附到其上。 第一载体（41）便于处理薄的晶片（30）。 然后粘合第二载体（51），并且将各种集成电路分离以产生多个薄的模具（81）。 一旦将薄的模具安装到期望的基板（91）上，则容易地移除第一载体（41）。 在一个实施例中，第一载体（41）具有当暴露于预定刺激（例如给定温度范围或给定的光子能量的给定频率范围）时变得较不粘附的粘合剂。 这种薄的模具（或包含这种模具的模块）易于堆叠以便实现显着增加的电路密度。
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公开(公告)号：US20070247824A1
公开(公告)日：2007-10-25
申请号：US11379751
申请日：2006-04-21
CPC分类号： H05K1/147 , H05K1/118 , H05K1/144 , H05K3/361 , H05K3/363 , H05K2201/041 , H05K2201/10189 , H05K2201/10674 , H05K2203/1572
摘要： An electronic apparatus, includes a plurality of electronic modules, each having a maximum thickness of no more than 90 microns, each comprising a substrate having a two sided edge connection pattern. The electronic modules are arranged adjacent to each other. Each pad of a first set of connection pads on a first electronic module is conductively connected to an opposing pad of a second set of connection pads of a second electronic module. The first set of connection pads is separated from the second set of connection pads by electrically conductive material that is less than 15 microns thick.
摘要翻译： 一种电子设备，包括多个电子模块，每个电子模块的最大厚度不超过90微米，每个电子模块包括具有双面边缘连接图案的基板。 电子模块彼此相邻布置。 第一电子模块上的第一组连接焊盘的每个焊盘导电地连接到第二电子模块的第二组连接焊盘的相对焊盘。 第一组连接焊盘通过小于15微米厚的导电材料与第二组连接焊盘分开。
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