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公开(公告)号:US09508662B2
公开(公告)日:2016-11-29
申请号:US14827841
申请日:2015-08-17
Applicant: Renesas Electronics Corporation
Inventor: Hiroyuki Kunishima , Yasutaka Nakashiba , Masaru Wakabayashi , Shinichi Watanuki , Ken Ozawa , Tatsuya Usami , Yoshiaki Yamamoto , Keiji Sakamoto
CPC classification number: H01L23/60 , G02B6/43 , G02F1/0121 , G02F1/025 , G02F2201/12 , G02F2202/105 , H01L31/02002 , H01L2924/0002 , H05K1/0296 , H01L2924/00
Abstract: A technique is provided which can prevent the quality of an electrical signal from degrading in an optical semiconductor device.In a cross-section perpendicular to an extending direction of an electrical signal transmission line, the electrical signal transmission line is surrounded by a shielding portion including a first noise cut wiring, second plugs, a first layer wiring, first plugs, a shielding semiconductor layer, first plugs, a first layer wiring, second plugs, and a second noise cut wiring, and the shielding portion is fixed to a reference potential. Thereby, the shielding portion blocks noise due to effects of a magnetic field or an electric field from the semiconductor substrate, which affects the electrical signal transmission line.
Abstract translation: 在垂直于电信号传输线的延伸方向的横截面中,电信号传输线由屏蔽部分包围,该屏蔽部分包括第一噪声切断布线,第二插塞,第一层布线,第一插塞,屏蔽半导体层 ,第一插头,第一层布线,第二插头和第二噪声切断布线,并且屏蔽部分被固定为参考电位。 因此,屏蔽部分由于影响电信号传输线的来自半导体衬底的磁场或电场的影响而阻塞噪声。
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公开(公告)号:US20160056115A1
公开(公告)日:2016-02-25
申请号:US14827841
申请日:2015-08-17
Applicant: Renesas Electronics Corporation
Inventor: Hiroyuki Kunishima , Yasutaka Nakashiba , Masaru Wakabayashi , Shinichi Watanuki , Ken Ozawa , Tatsuya Usami , Yoshiaki Yamamoto , Keiji Sakamoto
CPC classification number: H01L23/60 , G02B6/43 , G02F1/0121 , G02F1/025 , G02F2201/12 , G02F2202/105 , H01L31/02002 , H01L2924/0002 , H05K1/0296 , H01L2924/00
Abstract: A technique is provided which can prevent the quality of an electrical signal from degrading in an optical semiconductor device.In a cross-section perpendicular to an extending direction of an electrical signal transmission line, the electrical signal transmission line is surrounded by a shielding portion including a first noise cut wiring, second plugs, a first layer wiring, first plugs, a shielding semiconductor layer, first plugs, a first layer wiring, second plugs, and a second noise cut wiring, and the shielding portion is fixed to a reference potential. Thereby, the shielding portion blocks noise due to effects of a magnetic field or an electric field from the semiconductor substrate, which affects the electrical signal transmission line.
Abstract translation: 提供了可以防止电信号在光半导体器件中劣化的技术。 在垂直于电信号传输线的延伸方向的横截面中,电信号传输线由屏蔽部分包围,该屏蔽部分包括第一噪声切断布线,第二插塞,第一层布线,第一插塞,屏蔽半导体层 ,第一插头,第一层布线,第二插头和第二噪声切断布线,并且屏蔽部分被固定为参考电位。 因此,屏蔽部分由于影响电信号传输线的来自半导体衬底的磁场或电场的影响而阻塞噪声。
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公开(公告)号:US10818813B2
公开(公告)日:2020-10-27
申请号:US16188985
申请日:2018-11-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tomoo Nakayama , Shinichi Watanuki , Futoshi Komatsu , Teruhiro Kuwajima , Takashi Ogura , Hiroyuki Okuaki , Shigeaki Shimizu
IPC: H01L31/105 , H01L31/18 , G02B6/136 , G02B6/122 , H01L31/0224 , G02B6/12
Abstract: In order to improve the performance of a semiconductor device, a semiconductor layer EP is formed over a p-type semiconductor PR. An n-type semiconductor layer NR1 is formed over the semiconductor layer EP. The semiconductor layer PR, the semiconductor layer EP, and the semiconductor layer NR1 respectively configure part of a photoreceiver. A cap layer of a material different from that of the semiconductor layer EP is formed over the semiconductor layer EP, and a silicide layer, which is a reaction product of a metal and the material included in the cap layer, is formed within the cap layer. A plug having a barrier metal film BM1 is formed over the cap layer through the silicide layer. Here, a reaction product of the metal and the material included in the semiconductor layer NR1 is not formed within the semiconductor layer NR1.
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公开(公告)号:US10553734B2
公开(公告)日:2020-02-04
申请号:US15980661
申请日:2018-05-15
Applicant: Renesas Electronics Corporation
Inventor: Teruhiro Kuwajima , Shinichi Watanuki , Futoshi Komatsu , Tomoo Nakayama
IPC: H01L31/02 , H01L31/028 , H01L31/18 , H01L23/48 , H01L23/522 , H01L31/024 , H01L31/0232 , H01L31/0352 , H01L27/12 , G02B6/122 , G02F1/025 , G02B6/43
Abstract: An improvement is achieved in the reliability of a semiconductor device. Over an insulating layer, an optical waveguide and a p-type semiconductor portion are formed. Over the p-type semiconductor portion, a multi-layer body including an n-type semiconductor portion and a cap layer is formed. Over a first interlayer insulating film covering the optical waveguide, the p-type semiconductor portion, and the multi-layer body, a heater located over the optical waveguide is formed. In the first interlayer insulating film, first and second contact holes are formed. A first contact portion electrically coupled with the p-type semiconductor portion is formed continuously in the first contact hole and over the first interlayer insulating film. A second contact portion electrically coupled with the cap layer is formed continuously in the second contact hole and over the first interlayer insulating film. A wire formed over a second interlayer insulating film is electrically coupled with the heater and the first and second contact portions via plugs embedded in the second interlayer insulating film.
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公开(公告)号:US10466415B2
公开(公告)日:2019-11-05
申请号:US15961435
申请日:2018-04-24
Applicant: Renesas Electronics Corporation
Inventor: Yasutaka Nakashiba , Shinichi Watanuki
Abstract: A semiconductor device including an optical waveguide and a p-type semiconductor portion is configured as follows. The optical waveguide includes: a first semiconductor layer formed on an insulating layer; an insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the insulating layer. The p-type semiconductor portion includes the first semiconductor layer. The film thickness of the p-type semiconductor portion is smaller than that of the optical waveguide. By forming the insulating layer between the first semiconductor layer and the second semiconductor layer, control of the film thicknesses of the optical waveguide and the p-type semiconductor portion is facilitated. Specifically, when the unnecessary second semiconductor layer is removed by etching in a step of forming the p-type semiconductor portion, the insulating layer which is the lower layer functions as an etching stopper, and the film thickness of the p-type semiconductor portion can be easily adjusted.
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公开(公告)号:US10355161B2
公开(公告)日:2019-07-16
申请号:US15703525
申请日:2017-09-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Teruhiro Kuwajima , Shinichi Watanuki , Futoshi Komatsu , Tomoo Nakayama
IPC: H01L31/18 , H01L31/028 , H01L31/105 , H01L31/0224
Abstract: To achieve a high-reliability germanium photoreceiver. A photoreceiver portion of a germanium photoreceiver comprised of a p type silicon core layer, an i type germanium layer, and an n type silicon layer is covered with a second insulating film and from a coupling hole formed in the second insulating film, a portion of the upper surface of the photoreceiver portion is exposed. The coupling hole has, on the inner wall thereof, a barrier metal film and the barrier metal film has thereon a first-layer wiring made of a tungsten film. Tungsten hardly diffuses from the tungsten film into the i type germanium layer even when a thermal stress is applied, making it possible to prevent the resulting germanium photoreceiver from having diode characteristics deteriorated by the thermal stress.
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公开(公告)号:US10025048B2
公开(公告)日:2018-07-17
申请号:US15648214
申请日:2017-07-12
Applicant: Renesas Electronics Corporation
Inventor: Shinichi Watanuki , Yasutaka Nakashiba
Abstract: An interposer includes a plurality of identical functional blocks arranged in the x direction, for example, and the functional blocks include a first region mounting a semiconductor chip, a second region mounting a light emitting element chip, a third region mounting a light receiving element chip, and a plurality of silicon waveguides. Then, the second and third regions are arranged between the first region and a first side along the x direction of the interposer. In addition, the plurality of silicon waveguides are arranged between the second region and the first side, and between the third region and the first side, extending from the second region toward the first side and from the third region toward the first side and are not formed between the functional blocks adjacent in the x direction.
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公开(公告)号:US09835882B2
公开(公告)日:2017-12-05
申请号:US15152117
申请日:2016-05-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Hiroyuki Kunishima , Yasutaka Nakashiba , Masaru Wakabayashi , Shinichi Watanuki
CPC classification number: G02F1/025 , G02B6/125 , G02B6/132 , G02B6/2852 , G02B2006/12061 , G02B2006/12142 , G02B2006/12147 , G02F2201/08 , H01L23/53214 , H01L23/53228 , H01L2224/05
Abstract: A low reflectance film with a second reflectance (50% or lower) lower than a first reflectance is formed between an optical directional coupler and a first-layer wiring with the first reflectance. Thus, even when the first-layer wiring is formed above the optical directional coupler, the influence of the light reflected by the first-layer wiring on the optical signal propagating through the first optical waveguide and the second optical waveguide of the optical directional coupler can be reduced. Accordingly, the first-layer wiring can be arranged above the optical directional coupler, and the restriction on the layout of the first-layer wiring is relaxed.
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公开(公告)号:US09739964B2
公开(公告)日:2017-08-22
申请号:US15186528
申请日:2016-06-19
Applicant: Renesas Electronics Corporation
Inventor: Shinichi Watanuki , Yasutaka Nakashiba
CPC classification number: G02B6/428 , G02B6/43 , G02B2006/12061
Abstract: An interposer includes a plurality of identical functional blocks arranged in the x direction, for example, and the functional blocks include a first region mounting a semiconductor chip, a second region mounting a light emitting element chip, a third region mounting a light receiving element chip, and a plurality of silicon waveguides. Then, the second and third regions are arranged between the first region and a first side along the x direction of the interposer. In addition, the plurality of silicon waveguides are arranged between the second region and the first side, and between the third region and the first side, extending from the second region toward the first side and from the third region toward the first side and are not formed between the functional blocks adjacent in the x direction.
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公开(公告)号:US10921515B2
公开(公告)日:2021-02-16
申请号:US16681372
申请日:2019-11-12
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yasutaka Nakashiba , Shinichi Watanuki , Tohru Kawai
Abstract: A semiconductor device includes a substrate having a first surface and a second surface that have top and back relation, an insulating layer formed on the first surface of the substrate, and an optical waveguide formed on the insulating layer and formed of a semiconducting layer. A first opening is formed on the second surface of the substrate. The first opening overlaps the optical waveguide in plan view.
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