-
公开(公告)号：US20180149812A1
公开(公告)日：2018-05-31
申请号：US15871504
申请日：2018-01-15
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI
IPC: G02B6/13 , G02B6/122 , G02B6/132 , G02F1/01 , G02F1/025 , G02B6/12 , G02B6/43 , H01L31/0232 , H01L31/18
CPC classification number: G02B6/13 , G02B6/12004 , G02B6/122 , G02B6/1223 , G02B6/132 , G02B6/43 , G02B2006/12038 , G02B2006/12061 , G02F1/0121 , G02F1/025 , G02F2202/104 , H01L31/02325 , H01L31/02327 , H01L31/18
Abstract: An SOI substrate is attracted to and detached from an electrostatic chuck included in a semiconductor manufacturing device without failures. A semiconductor device includes a semiconductor substrate made of silicon, a first insulating film formed on a main surface of the semiconductor substrate and configured to generate compression stress to silicon, a waveguide, made of silicon, formed on the first insulating film, and a first interlayer insulating film formed on the first insulating film so as to cover the waveguide. Further, a second insulating film configured to generate tensile stress to silicon is formed on the first interlayer insulating film and in a region distant from the optical waveguide by a thickness of the first insulating film or larger. The second insulating film offsets the compression of the first insulating film.
-
公开(公告)号：US20180039021A1
公开(公告)日：2018-02-08
申请号：US15789655
申请日：2017-10-20
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI
CPC classification number: G02B6/122 , G02B6/13 , G02B2006/12061 , G02F1/025 , G02F2202/104
Abstract: Good optical properties can be achieved in an optical waveguide made of polycrystalline silicon.A semiconductor layer that constitutes each of a first optical signal line, a second optical signal line, a grating coupler, an optical modulator, and a p-type layer of a germanium optical receiver is formed by a polycrystalline silicon film. Crystal grains of polycrystalline silicon exposed on an upper surface of the semiconductor layer include crystal grains having flat surfaces parallel to a first main surface of a semiconductor substrate, and crystal grains of polycrystalline silicon exposed on side surfaces (including side surfaces of a protrusion of a protruding portion) of the semiconductor layer include crystal grains having flat surfaces perpendicular to the first main surface of the semiconductor substrate.
-
公开(公告)号：US20170012143A1
公开(公告)日：2017-01-12
申请号：US15186521
申请日：2016-06-19
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI , Takashi OGURA
IPC: H01L31/0288 , H01L31/0352 , H01L31/18
Abstract: A germanium optical receiver in which a dark current is small is achieved. The germanium optical receiver is formed of a p-type germanium layer, a non-doped i-type germanium layer, and an n-type germanium layer that are sequentially stacked on an upper surface of a p-type silicon core layer, a first cap layer made of silicon is formed on the side surface of the i-type germanium layer, and a second cap layer made of silicon is formed on the upper surface and side surface of the n-type germanium layer. The n-type germanium layer is doped with such an element as phosphorus or boron having a covalent bonding radius smaller than a covalent bonding radius of germanium.
Abstract translation: 实现了暗电流小的锗光接收器。 锗光接收器由p型锗层，非掺杂i型锗层和n型锗层构成，其依次层叠在p型硅芯层的上表面上，第一 在i型锗层的侧表面上形成由硅制成的盖层，并且在n型锗层的上表面和侧表面上形成由硅制成的第二盖层。 n型锗层掺杂有诸如磷或硼的元素，其共价键半径小于锗的共价键半径。
-
公开(公告)号：US20210028082A1
公开(公告)日：2021-01-28
申请号：US15931230
申请日：2020-05-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tatsuya USAMI , Hironobu MIYAMOTO , Masami SAWADA
IPC: H01L23/367 , H01L23/373 , H01L29/24 , H01L29/20 , H01L29/16
Abstract: A Semiconductor device includes a substrate and a thermal conductive film. The substrate has a top surface and a back surface which oppose with each other. A first opening is formed on the back surface of substrate. The thermal conductive film includes a first thermal conductive portion formed in the first opening. The first thermal conductive portion is embedded in the first opening such that a void is formed in the first opening.
-
公开(公告)号：US20190018187A1
公开(公告)日：2019-01-17
申请号：US16127590
申请日：2018-09-11
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI
Abstract: Good optical properties can be achieved in an optical waveguide made of polycrystalline silicon.A semiconductor layer that constitutes each of a first optical signal line, a second optical signal line, a grating coupler, an optical modulator, and a p-type layer of a germanium optical receiver is formed by a polycrystalline silicon film. Crystal grains of polycrystalline silicon exposed on an upper surface of the semiconductor layer include crystal grains having flat surfaces parallel to a first main surface of a semiconductor substrate, and crystal grains of polycrystalline silicon exposed on side surfaces (including side surfaces of a protrusion of a protruding portion) of the semiconductor layer include crystal grains having flat surfaces perpendicular to the first main surface of the semiconductor substrate.
-
Patent Agency Ranking
公开(公告)号：US20180366321A1
公开(公告)日：2018-12-20
申请号：US15934710
申请日：2018-03-23
Applicant: Renesas Electronics Corporation
Inventor： Tomoo NAKAYAMA , Tatsuya USAMI
IPC: H01L21/02 , H01L21/3213 , H01L29/66
CPC classification number: H01L21/02164 , H01L21/02274 , H01L21/2652 , H01L21/266 , H01L21/32139 , H01L21/823814 , H01L29/66477
Abstract: The reliability of a semiconductor device is improved. A photoresist pattern is formed over a semiconductor substrate. Then, over the semiconductor substrate, a protective film is formed in such a manner as to cover the photoresist pattern. Then, with the photoresist pattern covered with the protective film, an impurity is ion implanted into the semiconductor substrate. Thereafter, the protective film is removed by wet etching, and then, the photoresist pattern is removed.
-
公开(公告)号：US20170307824A1
公开(公告)日：2017-10-26
申请号：US15647838
申请日：2017-07-12
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI , Keiji SAKAMOTO , Hiroyuki KUNISHIMA
CPC classification number: G02B6/1347 , G02B6/12004 , G02B6/122 , G02B6/136 , G02B2006/12061 , G02B2006/121 , G02F1/025 , H01L23/562
Abstract: A rectangular optical waveguide, an optical phase shifter and an optical modulator each formed of a semiconductor layer are formed on an insulating film constituting an SOI wafer, and then a rear insulating film formed on a rear surface of the SOI wafer is removed. Moreover, a plurality of trenches each having a first depth from an upper surface of the insulating film are formed at a position not overlapping with the rectangular optical waveguide, the optical phase shifter and the optical modulator when seen in a plan view in the insulating film. As a result, since an electric charge can be easily released from the SOI wafer even when the SOI wafer is later mounted on the electrostatic chuck included in the semiconductor manufacturing apparatus, the electric charge is less likely to be accumulated on the rear surface of the SOI wafer.
-
公开(公告)号：US20170069769A1
公开(公告)日：2017-03-09
申请号：US15244853
申请日：2016-08-23
Inventor： Tatsuya USAMI , Yoshiaki YAMAMOTO , Keiji SAKAMOTO , Tohru MOGAMI , Tsuyoshi HORIKAWA , Keizo KINOSHITA
IPC: H01L31/0232 , H01L31/18 , G02B6/136 , G02B6/12 , G02B6/122
CPC classification number: H01L31/02327 , G02B6/12004 , G02B6/122 , G02B6/136 , G02B2006/12061 , G02B2006/12123 , H01L31/1808
Abstract: A performance of a semiconductor device is improved. In a method of manufacturing a semiconductor device, a first semiconductor portion and a second semiconductor portion made of silicon are formed on a base body via an insulation layer, and a third semiconductor portion including a semiconductor layer made of germanium is formed on the second semiconductor portion. Next, an insulation film is formed above the first semiconductor portion, an opening portion reaching the first semiconductor portion from an upper surface of the insulation film is formed, and a metal silicide layer is formed on a part of an upper surface of the first semiconductor portion exposed to the opening portion.
Abstract translation: 提高了半导体器件的性能。 在制造半导体器件的方法中，通过绝缘层在基体上形成由硅制成的第一半导体部分和第二半导体部分，并且在第二半导体上形成包括由锗制成的半导体层的第三半导体部分 一部分。 接着，在第一半导体部分的上方形成绝缘膜，形成从绝缘膜的上表面到达第一半导体部分的开口部，在第一半导体的上表面的一部分上形成金属硅化物层 部分暴露于开口部分。
-
公开(公告)号：US20160260772A1
公开(公告)日：2016-09-08
申请号：US15047746
申请日：2016-02-19
Applicant: Renesas Electronics Corporation
Inventor： Tatsuya USAMI , Yukio MIURA
CPC classification number: H01L43/08 , H01L27/228 , H01L43/12
Abstract: To provide a magnetoresistance effect element configuring MRAM by dry etching and thereby processing a stacked film including magnetic layers, in order to prevent a leakage current from flowing between the magnetic layers, that is, magnetic free layer and magnetic pinned layer which configure a magnetic tunnel junction (MTJ) via a metal deposit that has attached to the side wall of the MTJ. After formation of the magnetoresistance effect element by dry etching, plasma treatment is performed in a gas atmosphere containing carbon and oxygen to remove a metal deposit attached to the magnetoresistance effect element. By this plasma treatment, oxide films are formed on the side walls of the magnetic free layer and the magnetic pinned layer, respectively.
Abstract translation: 为了提供通过干蚀刻配置MRAM并由此处理包括磁性层的层叠膜的磁阻效应元件，以便防止漏磁电流在磁层之间流动，即配置磁隧道的磁性自由层和磁性固定层 （MTJ）通过附着在MTJ侧壁上的金属沉积物。 在通过干蚀刻形成磁阻效应元件之后，在含有碳和氧的气体气氛中进行等离子体处理，以除去附着在磁阻效应元件上的金属沉积物。 通过这种等离子体处理，氧化膜分别形成在磁性自由层和磁性固定层的侧壁上。
-
公开(公告)号：US20210184054A1
公开(公告)日：2021-06-17
申请号：US16951692
申请日：2020-11-18
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Hironobu MIYAMOTO , Masami SAWADA , Tatsuya USAMI , Tomoo NAKAYAMA
IPC: H01L29/861 , H01L29/24 , H01L29/66
Abstract: A gallium oxide diode includes: a gallium oxide substrate having an n-type gallium oxide drift layer; an anode electrode of a metal film formed over a front surface of the n-type gallium oxide drift layer; a cathode electrode formed over a rear surface of the gallium oxide substrate; and a reaction layer of a metal oxide film of p-type conductivity formed between the anode electrode and the n-type gallium oxide drift layer. Further, a manufacturing method of a gallium oxide diode includes steps of forming an anode electrode of a metal film over an n-type gallium oxide drift layer formed over a gallium oxide substrate; and forming a reaction layer between the anode electrode and the n-type gallium oxide drift layer by performing a heat treatment to the gallium oxide substrate after forming the anode electrode, the reaction layer being made of a metal oxide film with p-type conductivity.
-
-
-
-
-
-
-
-
-
Search Results
27
records
(took 0.02 seconds)
