Capacitor component including through-hole structure to increase capacitance

    公开(公告)号:US11978595B2

    公开(公告)日:2024-05-07

    申请号:US17712424

    申请日:2022-04-04

    CPC classification number: H01G4/248 H01G4/232 H01G4/30

    Abstract: A capacitor component includes a body having first surface and second surfaces opposing each other and including through-holes penetrating through the first surface and the second surface, a first electrode covering an inner wall of each of the plurality of through-holes, a first common electrode covering the first surface and connected to the first electrode, a dielectric layer surrounded by the first electrode in the through-hole, a second electrode surrounded by the dielectric layer in the through-hole, a second common electrode layer covering the second surface and connected to the second electrode, a first external electrode disposed on at least one of a plurality of side surfaces of the body and connected to the first common electrode layer, and a second external electrode disposed on at least one of the plurality of side surfaces of the body and connected to the second common electrode layer.

    Semiconductor package
    14.
    发明授权

    公开(公告)号:US11043440B2

    公开(公告)日:2021-06-22

    申请号:US16567560

    申请日:2019-09-11

    Abstract: A semiconductor package includes a semiconductor chip having an active surface, on which a connection pad is disposed, and an inactive surface disposed to oppose the active surface, a heat dissipation member, disposed on the inactive surface of the semiconductor chip, having a plurality of holes and including a graphite-based material, an encapsulant covering at least a portion of each of the semiconductor chip and the heat dissipation member, and a connection member, disposed on the active surface of the semiconductor chip, including a redistribution layer electrically connected to the connection pad. 0

    SEMICONDUCTOR PACKAGE
    15.
    发明申请

    公开(公告)号:US20200266178A1

    公开(公告)日:2020-08-20

    申请号:US16391896

    申请日:2019-04-23

    Abstract: A semiconductor package includes a first connection structure having a first surface and a second surface and including one or more first redistribution layers, a first semiconductor chip disposed on the first surface, a second semiconductor chip disposed on the second surface, a third semiconductor chip disposed on the second surface, and at least one first passive component disposed between the second and third semiconductor chips on the second surface. The first connection structure may include a first region including a region overlapping the first passive component, and a second region including regions respectively overlapping at least portions of the second and third semiconductor chips, when viewed from above. The first region may be disposed between second regions. The first redistribution may include at least one of a power pattern and a ground pattern in the first region and include a signal pattern in the second region.

    Fan-out semiconductor package
    16.
    发明授权

    公开(公告)号:US10692818B2

    公开(公告)日:2020-06-23

    申请号:US15923308

    申请日:2018-03-16

    Abstract: A fan-out semiconductor package includes: a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the semiconductor chip; a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; a passivation layer disposed on the connection member and having openings exposing at least portions of the redistribution layer; metal members disposed in the openings of the passivation layer and connected to the exposed redistribution layer; and electrical connection structures disposed on the passivation layer and connected to the metal members, wherein the electrical connection structures have heights hierarchically differentiated from one another depending on sizes of the metal members.

    SEMICONDUCTOR PACKAGE
    17.
    发明申请

    公开(公告)号:US20190189549A1

    公开(公告)日:2019-06-20

    申请号:US15962867

    申请日:2018-04-25

    Abstract: A semiconductor package includes a first connection member having a first surface and a second surface and including an insulating member and a first redistribution layer, a semiconductor chip connection electrodes disposed on the first connection member, an encapsulant on the second surface of the first connection member, including a photosensitive insulating material, and having a first region covering the active surface of the semiconductor chip and a second region in the vicinity of the semiconductor chip, a second redistribution layer including connection vias penetrating through the first region of the encapsulant, through-vias penetrating through the second region of the encapsulant, and a wiring pattern on the encapsulant and having an integrated structure with the connection vias and the through-vias, and a second connection member on the encapsulant including a third redistribution layer connected to the second redistribution layer.

    Fan-out semiconductor package
    18.
    发明授权

    公开(公告)号:US10304807B2

    公开(公告)日:2019-05-28

    申请号:US15951571

    申请日:2018-04-12

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Electronic component package and electronic device including the same

    公开(公告)号:US10032697B2

    公开(公告)日:2018-07-24

    申请号:US15203006

    申请日:2016-07-06

    Abstract: An electronic component package may include: a redistribution layer including a first insulating layer, a first conductive pattern disposed on the first insulating layer, and a first via connected to the first conductive pattern while penetrating through the first insulating layer; an electronic component disposed on the redistribution layer; and an encapsulant encapsulating the electronic component. The first via has a horizontal cross-sectional shape in which a distance between first and second edge points of the first via in a first direction passing through the center of the first via and the first and second edge points thereof is shorter than that between third and fourth edge points of the first via in a second direction perpendicular to the first direction and passing through the center of the first via and the third and fourth points thereof.

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