Inductor
    1.
    发明授权
    Inductor 有权

    公开(公告)号:US11289264B2

    公开(公告)日:2022-03-29

    申请号:US16190993

    申请日:2018-11-14

    Abstract: An inductor includes a body in which a plurality of insulating layers on which a plurality of coil patterns are arranged are stacked, and first and second external electrodes disposed on an external surface of the body, wherein the plurality of coil patterns are connected through coil connecting portions and include coil patterns disposed on an outer side and coil patterns disposed on an inner side thereof, a coil pattern disposed on the inner side adjacent to the coil pattern disposed on the outer side includes two coil connecting portions spaced apart from each other and facing each other in a length direction of the body, and a dummy electrode pattern is further disposed in a void portion between two coil connecting portions.

    Antenna module
    2.
    发明授权

    公开(公告)号:US10685926B2

    公开(公告)日:2020-06-16

    申请号:US16284289

    申请日:2019-02-25

    Abstract: An antenna module includes an antenna substrate including a core layer, insulating layers disposed on opposite surfaces of the core layer, and wiring layers including antenna patterns. The antenna substrate has first and second recess portions. The antenna module further includes a passive component disposed in the first recess portion, a semiconductor chip disposed in the second recess portion and having an active surface, an encapsulant encapsulating at least portions of the semiconductor chip and the passive component, and a connection portion disposed on the active surface of the semiconductor chip and including redistribution layers electrically connected to the semiconductor chip. The passive component has a thickness greater than that of the semiconductor chip, and the first recess portion has a depth greater than that of the second recess portion.

    Fan-out semiconductor package
    3.
    发明授权

    公开(公告)号:US10553541B2

    公开(公告)日:2020-02-04

    申请号:US15955230

    申请日:2018-04-17

    Abstract: The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.

    Fan-out semiconductor package
    6.
    发明授权

    公开(公告)号:US10217631B2

    公开(公告)日:2019-02-26

    申请号:US15673149

    申请日:2017-08-09

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.

    Fan-out semiconductor package
    7.
    发明授权

    公开(公告)号:US10096552B2

    公开(公告)日:2018-10-09

    申请号:US15689861

    申请日:2017-08-29

    Abstract: A fan-out semiconductor package includes: a first semiconductor chip; a first encapsulant; a connection member including first vias and a first redistribution layer; a second semiconductor chip; a second encapsulant; a second redistribution layer; second vias; and third vias. A length of the longest side of a first cut surface of the second via is less than that of the longest side of a second cut surface of the third via, the first cut surface of the second via and the second cut surface of the third via being cut by a plane on any level parallel to the second active surface.

    Fan-out semiconductor package
    8.
    发明授权

    公开(公告)号:US10026703B2

    公开(公告)日:2018-07-17

    申请号:US15679860

    申请日:2017-08-17

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface disposed to oppose the active surface; a dummy chip disposed in the through-hole and spaced apart from the semiconductor chip; a second connection member disposed on the first connection member, the dummy chip, and the active surface of the semiconductor chip; and an encapsulant encapsulating at least portions of the first connection member, the dummy chip, and the inactive surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads.

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