中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

24 records (took 0.05 seconds)

    Fan-out semiconductor package
    1.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10157886B2

    公开(公告)日：2018-12-18

    申请号：US15437766

    申请日：2017-02-21

    Applicant: Samsung Electro-Mechanics, Co., Ltd.

    Inventor： Dae Hyun Park ,  Eun Jung Jo ,  Sung Won Jeong ,  Han Kim ,  Mi Ja Han

    IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    2.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10121769B2

    公开(公告)日：2018-11-06

    申请号：US15437766

    申请日：2017-02-21

    Applicant: Samsung Electro-Mechanics, Co., Ltd.

    Inventor： Dae Hyun Park ,  Eun Jung Jo ,  Sung Won Jeong ,  Han Kim ,  Mi Ja Han

    IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    5.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10096552B2

    公开(公告)日：2018-10-09

    申请号：US15689861

    申请日：2017-08-29

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Han Kim ,  Eun Jung Jo ,  Jung Ho Shim

    IPC: H01L25/10 ,  H01L25/065 ,  H01L23/28 ,  H01L23/48 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

    Abstract: A fan-out semiconductor package includes: a first semiconductor chip; a first encapsulant; a connection member including first vias and a first redistribution layer; a second semiconductor chip; a second encapsulant; a second redistribution layer; second vias; and third vias. A length of the longest side of a first cut surface of the second via is less than that of the longest side of a second cut surface of the third via, the first cut surface of the second via and the second cut surface of the third via being cut by a plane on any level parallel to the second active surface.

    SEMICONDUCTOR PACKAGE MODULE
    7.
    发明申请
    SEMICONDUCTOR PACKAGE MODULE 审中-公开
    半导体封装模块

    公开(公告)号：US20150181708A1

    公开(公告)日：2015-06-25

    申请号：US14268156

    申请日：2014-05-02

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jong In Ryu ,  Eun Jung Jo ,  Do Jae Yoo

    IPC: H05K1/11

    CPC classification number: H05K1/111 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/10189 ,  H05K2201/10515 ,  H05K2201/10545 ,  Y02P70/611

    Abstract: There is provided a semiconductor package module including: a substrate having one or more connection terminals formed thereon; first electronic components mounted on a first surface of the substrate; second electronic components mounted on a second surface of the substrate; and third electronic components formed on the substrate and including connection electrodes connecting the one or more connection terminals and external terminals to each other.

    Abstract translation: 提供了一种半导体封装模块，包括：基板，其上形成有一个或多个连接端子; 安装在所述基板的第一表面上的第一电子部件; 安装在所述基板的第二表面上的第二电子部件; 以及形成在所述基板上并且包括将所述一个或多个连接端子和外部端子彼此连接的连接电极的第三电子部件。

    Fan-out semiconductor package including stacked chips
    8.
    发明授权
    Fan-out semiconductor package including stacked chips 有权

    公开(公告)号：US10734324B2

    公开(公告)日：2020-08-04

    申请号：US16171114

    申请日：2018-10-25

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Yun Tae Lee ,  Eun Jung Jo ,  Han Kim

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/18 ,  H01L25/065

    Abstract: A fan-out semiconductor package includes a core member having a first through-hole and including wiring layers; a first semiconductor chip disposed in the first through-hole and having first connection pads formed on a lower side of the first semiconductor chip; a first encapsulant covering the core member and the first semiconductor chip; a connection member disposed below the core member and the first semiconductor chip and including redistribution layers; a first stack chip disposed on the first encapsulant and electrically connected to the wiring layers through a first connection conductor; and a second encapsulant disposed on the first encapsulant and covering the first stack chip. The first semiconductor chip includes DRAM and/or a controller, the first stack chip includes a stack type NAND flash, and the first connection pads of the first semiconductor chip are electrically connected to the wiring layers through the redistribution layers.

Patent Agency Ranking