Abstract:
A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.
Abstract:
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.
Abstract:
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.
Abstract:
A printed circuit board includes a signal transmitting part and a ground part disposed having an insulating layer therebetween. The ground part includes an impedance adjusting part.
Abstract:
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.
Abstract:
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.
Abstract:
A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.
Abstract:
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.
Abstract:
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the first connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip.