Semiconductor package
    1.
    发明授权

    公开(公告)号:US11069666B2

    公开(公告)日:2021-07-20

    申请号:US16454907

    申请日:2019-06-27

    Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.

    Fan-out semiconductor package
    3.
    发明授权

    公开(公告)号:US10217631B2

    公开(公告)日:2019-02-26

    申请号:US15673149

    申请日:2017-08-09

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.

    Fan-out semiconductor package
    5.
    发明授权

    公开(公告)号:US10157886B2

    公开(公告)日:2018-12-18

    申请号:US15437766

    申请日:2017-02-21

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    6.
    发明授权

    公开(公告)号:US10121769B2

    公开(公告)日:2018-11-06

    申请号:US15437766

    申请日:2017-02-21

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    8.
    发明授权

    公开(公告)号:US10304807B2

    公开(公告)日:2019-05-28

    申请号:US15951571

    申请日:2018-04-12

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

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