公开(公告)号：US20130301353A1

公开(公告)日：2013-11-14

申请号：US13799554

申请日：2013-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moshe Twitto ,  Jun-Jin Kong

IPC: G11C16/16

CPC classification number: G11C16/16 ,  G11C16/10 ,  G11C16/3445

Abstract: Methods of driving a memory include erasing a plurality of memory cells of a memory device, testing whether the memory cells have been erased, and programming the memory cells without erasing the memory cells again if more than a predetermined percentage of the memory cells, but less than all of the memory cells, were successfully erased.

Abstract translation: 驱动存储器的方法包括擦除存储器件的多个存储器单元，测试存储器单元是否已被擦除，并且如果多于存储器单元的预定百分比，则不再擦除存储器单元而对存储器单元进行编程，而是更少 比所有的记忆单元都被成功擦除。

公开(公告)号：US10438684B2

公开(公告)日：2019-10-08

申请号：US14696609

申请日：2015-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong-Hyeog Choi ,  Jun-Jin Kong ,  Hong-Rak Son ,  Pil-Sang Yoon ,  Chang-Kyu Seol ,  Ki-Jun Lee

IPC: G06F11/10 ,  G11C29/52 ,  G11C29/04

Abstract: A method of operating a memory system, having a non-volatile memory device, includes processing a response to a first request toward the memory device by using an original key, in response to the first request, generating and storing first parity data corresponding to the original key, and deleting the original key.

公开(公告)号：US09761292B2

公开(公告)日：2017-09-12

申请号：US14693300

申请日：2015-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Kyu Seol ,  Seong-Hyeog Choi ,  Jun-Jin Kong ,  Hong-Rak Son

IPC: G06F12/14 ,  H04L9/32 ,  G06F11/10 ,  G11C29/50 ,  G06F21/31 ,  G06F12/02 ,  G11C7/24 ,  G11C29/04

CPC classification number: G11C7/24 ,  G06F11/1016 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1072 ,  G06F12/0246 ,  G06F12/1425 ,  G06F21/31 ,  G06F2212/1052 ,  G06F2212/7201 ,  G09C1/00 ,  G11C29/50004 ,  G11C2029/0411 ,  G11C2029/5004 ,  H04L9/32 ,  H04L9/3278

Abstract: Provided are a flash memory device, a flash memory system, and methods of operating the same. A method of operating a flash memory system includes selecting memory cells of a flash memory in response to an authentication challenge, programming pieces of input data into the selected memory cells, respectively, reading the selected memory cells and generating and storing control information, dividing the selected memory cells into at least one first region memory cell and at least one second region memory cell based on the control information, and setting read values of the at least one first region memory cell and the at least one second region memory cell as a first value and a second value, respectively, and generating an authentication response in the response to the authentication challenge.

公开(公告)号：US20150363336A1

公开(公告)日：2015-12-17

申请号：US14725542

申请日：2015-05-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEONG-HYEOG CHOI ,  Jun-Jin Kong ,  Hong-Rak Son ,  Pil-Sang Yoon ,  Chang-Kyu Seol ,  Jung-Soo Chung

IPC: G06F12/14 ,  G06F11/10 ,  G06F3/06 ,  G06F21/44

CPC classification number: G06F12/1416 ,  G06F3/0623 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/1008 ,  G06F21/44 ,  G06F21/80 ,  G06F2212/1052 ,  G06F2221/2103 ,  Y02D10/13

Abstract: A method of operating a memory system including a first function block and a second function block includes generating a first authentication response indicating physical characteristics of the memory system, via the second function block, in response to a first authentication request received from the first function block; performing an error correction decoding on the first authentication response, via the first function block, by using first parity data corresponding to the first authentication request; and determining whether the second function block is authentic, depending on a result of the error correction decoding.

Abstract translation: 一种操作包括第一功能块和第二功能块的存储器系统的方法包括响应于从第一功能块接收到的第一认证请求，经由第二功能块生成指示存储器系统的物理特性的第一认证响应 ; 通过使用与第一认证请求对应的第一奇偶校验数据，经由第一功能块对第一认证响应进行纠错解码; 以及根据纠错解码的结果确定第二功能块是否可信。

公开(公告)号：US09105339B2

公开(公告)日：2015-08-11

申请号：US13799554

申请日：2013-03-13

Applicant: Samsung Electronics, Co., Ltd.

Inventor： Moshe Twitto ,  Jun-Jin Kong

IPC: G11C16/16 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/16 ,  G11C16/10 ,  G11C16/3445

Abstract: Methods of driving a memory include erasing a plurality of memory cells of a memory device, testing whether the memory cells have been erased, and programming the memory cells without erasing the memory cells again if more than a predetermined percentage of the memory cells, but less than all of the memory cells, were successfully erased.

Abstract translation: 驱动存储器的方法包括擦除存储器件的多个存储器单元，测试存储器单元是否已被擦除，并且如果多于存储器单元的预定百分比，则不再擦除存储器单元而对存储器单元进行编程，而是更少 比所有的记忆单元都被成功擦除。

公开(公告)号：US10566066B2

公开(公告)日：2020-02-18

申请号：US16421229

申请日：2019-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hye-Jeong So ,  Dong-Hwan Lee ,  Seong-Hyeog Choi ,  Eun-Chu Oh ,  Jun-Jin Kong ,  Hong-Rak Son ,  Pil-Sang Yoon

IPC: G11C16/34 ,  G11C16/14 ,  G11C16/26 ,  G06F11/10 ,  G11C16/10 ,  G11C16/04 ,  G11C11/56

Abstract: A method of operating a memory controller includes classifying a plurality of memory cells in an erase state into a plurality of groups, based on erase state information about the plurality of memory cells in the erase state; setting at least one target program state for at least some memory cells from among memory cells included in at least one of the plurality of groups; and programming the at least some memory cells for which the at least one target program state has been set, to a program state other than the at least one target program state from among the plurality of program states.

公开(公告)号：US10404407B2

公开(公告)日：2019-09-03

申请号：US15683456

申请日：2017-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yaron Shany ,  Jun-Jin Kong

IPC: H03M13/03 ,  H04L1/00 ,  H03M13/15 ,  H03M13/45 ,  H03M13/00

Abstract: An application specific integrated circuit (ASIC) tangibly encodes a program of instructions executable by the integrated circuit to perform a method for fast Chase decoding of generalized Reed-Solomon (GRS) codes. The method includes using outputs of a syndrome-based hard-decision (HD) algorithm to find an initial Groebner basis G for a solution module of a key equation, upon failure of HD decoding of a GRS codeword received by the ASIC from a communication channel; traversing a tree of error patterns on a plurality of unreliable coordinates to adjoin a next weak coordinate, where vertices of the tree of error patterns correspond to error patterns, and edges connect a parent error pattern to a child error pattern having exactly one additional non-zero value, to find a Groebner basis for each adjoining error location; and outputting an estimated transmitted codeword when a correct error vector has been found.

公开(公告)号：US09570174B2

公开(公告)日：2017-02-14

申请号：US14446350

申请日：2014-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Avner Dor ,  Moshe Twitto ,  Jun-Jin Kong ,  Hong-Rak Son ,  Young-Geon Yoo

IPC: G06F11/10 ,  G11C16/10 ,  G11C16/08 ,  G11C11/56 ,  G11C16/04

CPC classification number: G11C16/10 ,  G06F11/1048 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08

Abstract: Provided are a coding/decoding method for use in a multi-level memory system. The coding method includes searching for a set of symbols that may generate a forbidden pattern that is set initially from an input data stream, and sticking at least one bit included in the searched set of the symbols that may generate the forbidden pattern so as not to generate the forbidden pattern.

Abstract translation: 提供了一种用于多级存储器系统中的编码/解码方法。 编码方法包括搜索可以生成最初从输入数据流设置的禁止模式的一组符号，并且将包含在搜索到的可能生成禁止模式的符号组中的至少一个比特，以便不 生成禁止的模式。

公开(公告)号：US09407286B2

公开(公告)日：2016-08-02

申请号：US14017525

申请日：2013-09-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-Hwan Kim ,  Jun-Jin Kong ,  Dae-Wook Kim ,  Man-Keun Seo ,  Hong-Rak Son

IPC: G06F17/30 ,  H03M7/30

CPC classification number: H03M7/3084

Abstract: Provided are data compression method, data compression apparatus, and memory system. The data compression method includes receiving input data and generating a hash key for the input data, searching a hash table with the generated hash key, and if it is determined that the input data is a hash hit, compressing the input data using the hash table; and searching a cache memory with the input data, and if it is determined that the input data is a cache hit, compressing the input data using the cache memory.

Abstract translation: 提供数据压缩方法，数据压缩装置和存储系统。 数据压缩方法包括：接收输入数据并产生用于输入数据的哈希密钥，用生成的散列密钥搜索散列表，以及如果确定输入数据是散列命中，则使用散列表压缩输入数据 ; 以及使用所述输入数据搜索高速缓冲存储器，并且如果确定所述输入数据是高速缓存命中，则使用所述高速缓冲存储器压缩所述输入数据。

公开(公告)号：US09189328B2

公开(公告)日：2015-11-17

申请号：US14079659

申请日：2013-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Min Kim ,  Jun-Jin Kong

IPC: G11C29/00 ,  H03M13/00 ,  G06F11/10 ,  H03M13/11

CPC classification number: G06F11/1012 ,  H03M13/1105 ,  H03M13/116

Abstract: A memory controller includes a register configured to store a parity check matrix, and an error correcting code (ECC) decoder configured to perform error bit correction on data supplied from a non-volatile memory device using the parity check matrix. The parity check matrix includes N column matrices, where N is a natural number. Each of the N column matrices includes multiple sub-matrices, and a last sub-matrix of the multiple sub-matrices of each column matrix, which is a non-zero valued matrix that comes last in an decoding sequence of the ECC decoder, is an identity matrix.

Abstract translation: 存储器控制器包括配置为存储奇偶校验矩阵的寄存器和配置成对使用奇偶校验矩阵从非易失性存储器件提供的数据执行错误位校正的纠错码（ECC）解码器。 奇偶校验矩阵包括N列矩阵，其中N是自然数。 每个N列矩阵包括多个子矩阵，并且作为ECC解码器的解码序列中最后存在的非零值矩阵的每个列矩阵的多个子矩阵的最后一个子矩阵是 身份矩阵。